gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
Andreas Hansson cb9e208a4c stats: Update stats to reflect SimpleDRAM changes
This patch bumps the stats to reflect the slight change in how the
retry is handled, and also the pruning of some redundant stats.
2013-03-01 13:20:30 -05:00

597 lines
66 KiB
Text

---------- Begin Simulation Statistics ----------
sim_seconds 1.829331 # Number of seconds simulated
sim_ticks 1829330593000 # Number of ticks simulated
final_tick 1829330593000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3233953 # Simulator instruction rate (inst/s)
host_op_rate 3233951 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 98537371937 # Simulator tick rate (ticks/s)
host_mem_usage 303612 # Number of bytes of host memory used
host_seconds 18.56 # Real time elapsed on the host
sim_insts 60037737 # Number of instructions simulated
sim_ops 60037737 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 857856 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 66839296 # Number of bytes read from this memory
system.physmem.bytes_read::tsunami.ide 2652288 # Number of bytes read from this memory
system.physmem.bytes_read::total 70349440 # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst 857856 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total 857856 # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks 7411136 # Number of bytes written to this memory
system.physmem.bytes_written::total 7411136 # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst 13404 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 1044364 # Number of read requests responded to by this memory
system.physmem.num_reads::tsunami.ide 41442 # Number of read requests responded to by this memory
system.physmem.num_reads::total 1099210 # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks 115799 # Number of write requests responded to by this memory
system.physmem.num_writes::total 115799 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst 468945 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 36537571 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::tsunami.ide 1449868 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 38456384 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 468945 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 468945 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks 4051283 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total 4051283 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks 4051283 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 468945 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 36537571 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::tsunami.ide 1449868 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 42507667 # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs 0 # Total number of read requests seen
system.physmem.writeReqs 0 # Total number of write requests seen
system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady
system.physmem.bytesRead 0 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 0 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::2 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::3 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::4 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::5 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::6 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::7 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::8 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::9 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::10 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::11 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::12 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::13 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::14 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::15 0 # Track reads on a per bank basis
system.physmem.perBankWrReqs::0 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::1 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::2 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::3 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::4 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::5 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::6 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::7 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::8 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::9 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::10 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::11 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::12 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::13 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::14 0 # Track writes on a per bank basis
system.physmem.perBankWrReqs::15 0 # Track writes on a per bank basis
system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry
system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry
system.physmem.totGap 0 # Total gap between requests
system.physmem.readPktSize::0 0 # Categorize read packet sizes
system.physmem.readPktSize::1 0 # Categorize read packet sizes
system.physmem.readPktSize::2 0 # Categorize read packet sizes
system.physmem.readPktSize::3 0 # Categorize read packet sizes
system.physmem.readPktSize::4 0 # Categorize read packet sizes
system.physmem.readPktSize::5 0 # Categorize read packet sizes
system.physmem.readPktSize::6 0 # Categorize read packet sizes
system.physmem.writePktSize::0 0 # Categorize write packet sizes
system.physmem.writePktSize::1 0 # Categorize write packet sizes
system.physmem.writePktSize::2 0 # Categorize write packet sizes
system.physmem.writePktSize::3 0 # Categorize write packet sizes
system.physmem.writePktSize::4 0 # Categorize write packet sizes
system.physmem.writePktSize::5 0 # Categorize write packet sizes
system.physmem.writePktSize::6 0 # Categorize write packet sizes
system.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see
system.physmem.totQLat 0 # Total cycles spent in queuing delays
system.physmem.totMemAccLat 0 # Sum of mem lat for all requests
system.physmem.totBusLat 0 # Total cycles spent in databus access
system.physmem.totBankLat 0 # Total cycles spent in bank access
system.physmem.avgQLat nan # Average queueing delay per request
system.physmem.avgBankLat nan # Average bank access latency per request
system.physmem.avgBusLat nan # Average bus latency per request
system.physmem.avgMemAccLat nan # Average memory access latency
system.physmem.avgRdBW 0.00 # Average achieved read bandwidth in MB/s
system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MB/s
system.physmem.avgConsumedRdBW 0.00 # Average consumed read bandwidth in MB/s
system.physmem.avgConsumedWrBW 0.00 # Average consumed write bandwidth in MB/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MB/s
system.physmem.busUtil 0.00 # Data bus utilization in percentage
system.physmem.avgRdQLen 0.00 # Average read queue length over time
system.physmem.avgWrQLen 0.00 # Average write queue length over time
system.physmem.readRowHits 0 # Number of row buffer hits during reads
system.physmem.writeRowHits 0 # Number of row buffer hits during writes
system.physmem.readRowHitRate nan # Row buffer hit rate for reads
system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
system.physmem.avgGap nan # Average gap between requests
system.iocache.replacements 41686 # number of replacements
system.iocache.tagsinuse 1.225558 # Cycle average of tags in use
system.iocache.total_refs 0 # Total number of references to valid blocks.
system.iocache.sampled_refs 41702 # Sample count of references to valid blocks.
system.iocache.avg_refs 0 # Average number of references to valid blocks.
system.iocache.warmup_cycle 1685780599067 # Cycle when the warmup percentage was hit.
system.iocache.occ_blocks::tsunami.ide 1.225558 # Average occupied blocks per requestor
system.iocache.occ_percent::tsunami.ide 0.076597 # Average percentage of cache occupancy
system.iocache.occ_percent::total 0.076597 # Average percentage of cache occupancy
system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses
system.iocache.ReadReq_misses::total 174 # number of ReadReq misses
system.iocache.WriteReq_misses::tsunami.ide 41552 # number of WriteReq misses
system.iocache.WriteReq_misses::total 41552 # number of WriteReq misses
system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses
system.iocache.demand_misses::total 41726 # number of demand (read+write) misses
system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses
system.iocache.overall_misses::total 41726 # number of overall misses
system.iocache.ReadReq_accesses::tsunami.ide 174 # number of ReadReq accesses(hits+misses)
system.iocache.ReadReq_accesses::total 174 # number of ReadReq accesses(hits+misses)
system.iocache.WriteReq_accesses::tsunami.ide 41552 # number of WriteReq accesses(hits+misses)
system.iocache.WriteReq_accesses::total 41552 # number of WriteReq accesses(hits+misses)
system.iocache.demand_accesses::tsunami.ide 41726 # number of demand (read+write) accesses
system.iocache.demand_accesses::total 41726 # number of demand (read+write) accesses
system.iocache.overall_accesses::tsunami.ide 41726 # number of overall (read+write) accesses
system.iocache.overall_accesses::total 41726 # number of overall (read+write) accesses
system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses
system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses
system.iocache.WriteReq_miss_rate::tsunami.ide 1 # miss rate for WriteReq accesses
system.iocache.WriteReq_miss_rate::total 1 # miss rate for WriteReq accesses
system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses
system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses
system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses
system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses
system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
system.iocache.blocked::no_targets 0 # number of cycles access was blocked
system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.iocache.fast_writes 0 # number of fast writes performed
system.iocache.cache_copies 0 # number of cache copies performed
system.iocache.writebacks::writebacks 41512 # number of writebacks
system.iocache.writebacks::total 41512 # number of writebacks
system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD).
system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes.
system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
system.disk0.dma_write_txs 395 # Number of DMA write transactions.
system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.dtb.fetch_accesses 0 # ITB accesses
system.cpu.dtb.read_hits 9710417 # DTB read hits
system.cpu.dtb.read_misses 10329 # DTB read misses
system.cpu.dtb.read_acv 210 # DTB read access violations
system.cpu.dtb.read_accesses 728856 # DTB read accesses
system.cpu.dtb.write_hits 6352487 # DTB write hits
system.cpu.dtb.write_misses 1142 # DTB write misses
system.cpu.dtb.write_acv 157 # DTB write access violations
system.cpu.dtb.write_accesses 291931 # DTB write accesses
system.cpu.dtb.data_hits 16062904 # DTB hits
system.cpu.dtb.data_misses 11471 # DTB misses
system.cpu.dtb.data_acv 367 # DTB access violations
system.cpu.dtb.data_accesses 1020787 # DTB accesses
system.cpu.itb.fetch_hits 4974615 # ITB hits
system.cpu.itb.fetch_misses 5006 # ITB misses
system.cpu.itb.fetch_acv 184 # ITB acv
system.cpu.itb.fetch_accesses 4979621 # ITB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_acv 0 # DTB read access violations
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.write_acv 0 # DTB write access violations
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.data_hits 0 # DTB hits
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
system.cpu.numCycles 3658661078 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 60037737 # Number of instructions committed
system.cpu.committedOps 60037737 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 55912968 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 324460 # Number of float alu accesses
system.cpu.num_func_calls 1484174 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 7110641 # number of instructions that are conditional controls
system.cpu.num_int_insts 55912968 # number of integer instructions
system.cpu.num_fp_insts 324460 # number of float instructions
system.cpu.num_int_register_reads 76953007 # number of times the integer registers were read
system.cpu.num_int_register_writes 41739788 # number of times the integer registers were written
system.cpu.num_fp_register_reads 163642 # number of times the floating registers were read
system.cpu.num_fp_register_writes 166520 # number of times the floating registers were written
system.cpu.num_mem_refs 16115688 # number of memory refs
system.cpu.num_load_insts 9747503 # Number of load instructions
system.cpu.num_store_insts 6368185 # Number of store instructions
system.cpu.num_idle_cycles 3598606249.772791 # Number of idle cycles
system.cpu.num_busy_cycles 60054828.227209 # Number of busy cycles
system.cpu.not_idle_fraction 0.016414 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.983586 # Percentage of idle cycles
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
system.cpu.kern.inst.hwrei 211316 # number of hwrei instructions executed
system.cpu.kern.ipl_count::0 74830 40.99% 40.99% # number of times we switched to this ipl
system.cpu.kern.ipl_count::21 243 0.13% 41.12% # number of times we switched to this ipl
system.cpu.kern.ipl_count::22 1866 1.02% 42.14% # number of times we switched to this ipl
system.cpu.kern.ipl_count::31 105620 57.86% 100.00% # number of times we switched to this ipl
system.cpu.kern.ipl_count::total 182559 # number of times we switched to this ipl
system.cpu.kern.ipl_good::0 73463 49.29% 49.29% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good::21 243 0.16% 49.46% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good::22 1866 1.25% 50.71% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good::31 73463 49.29% 100.00% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good::total 149035 # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_ticks::0 1811925911500 99.05% 99.05% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks::21 20110000 0.00% 99.05% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks::22 80238000 0.00% 99.05% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks::31 17304126000 0.95% 100.00% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks::total 1829330385500 # number of cycles we spent at this ipl
system.cpu.kern.ipl_used::0 0.981732 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used::31 0.695541 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used::total 0.816366 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.syscall::2 8 2.45% 2.45% # number of syscalls executed
system.cpu.kern.syscall::3 30 9.20% 11.66% # number of syscalls executed
system.cpu.kern.syscall::4 4 1.23% 12.88% # number of syscalls executed
system.cpu.kern.syscall::6 42 12.88% 25.77% # number of syscalls executed
system.cpu.kern.syscall::12 1 0.31% 26.07% # number of syscalls executed
system.cpu.kern.syscall::15 1 0.31% 26.38% # number of syscalls executed
system.cpu.kern.syscall::17 15 4.60% 30.98% # number of syscalls executed
system.cpu.kern.syscall::19 10 3.07% 34.05% # number of syscalls executed
system.cpu.kern.syscall::20 6 1.84% 35.89% # number of syscalls executed
system.cpu.kern.syscall::23 4 1.23% 37.12% # number of syscalls executed
system.cpu.kern.syscall::24 6 1.84% 38.96% # number of syscalls executed
system.cpu.kern.syscall::33 11 3.37% 42.33% # number of syscalls executed
system.cpu.kern.syscall::41 2 0.61% 42.94% # number of syscalls executed
system.cpu.kern.syscall::45 54 16.56% 59.51% # number of syscalls executed
system.cpu.kern.syscall::47 6 1.84% 61.35% # number of syscalls executed
system.cpu.kern.syscall::48 10 3.07% 64.42% # number of syscalls executed
system.cpu.kern.syscall::54 10 3.07% 67.48% # number of syscalls executed
system.cpu.kern.syscall::58 1 0.31% 67.79% # number of syscalls executed
system.cpu.kern.syscall::59 7 2.15% 69.94% # number of syscalls executed
system.cpu.kern.syscall::71 54 16.56% 86.50% # number of syscalls executed
system.cpu.kern.syscall::73 3 0.92% 87.42% # number of syscalls executed
system.cpu.kern.syscall::74 16 4.91% 92.33% # number of syscalls executed
system.cpu.kern.syscall::87 1 0.31% 92.64% # number of syscalls executed
system.cpu.kern.syscall::90 3 0.92% 93.56% # number of syscalls executed
system.cpu.kern.syscall::92 9 2.76% 96.32% # number of syscalls executed
system.cpu.kern.syscall::97 2 0.61% 96.93% # number of syscalls executed
system.cpu.kern.syscall::98 2 0.61% 97.55% # number of syscalls executed
system.cpu.kern.syscall::132 4 1.23% 98.77% # number of syscalls executed
system.cpu.kern.syscall::144 2 0.61% 99.39% # number of syscalls executed
system.cpu.kern.syscall::147 2 0.61% 100.00% # number of syscalls executed
system.cpu.kern.syscall::total 326 # number of syscalls executed
system.cpu.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal::wrmces 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal::wrfen 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal::wrvptptr 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal::swpctx 4177 2.17% 2.18% # number of callpals executed
system.cpu.kern.callpal::tbi 54 0.03% 2.20% # number of callpals executed
system.cpu.kern.callpal::wrent 7 0.00% 2.21% # number of callpals executed
system.cpu.kern.callpal::swpipl 175246 91.19% 93.40% # number of callpals executed
system.cpu.kern.callpal::rdps 6771 3.52% 96.92% # number of callpals executed
system.cpu.kern.callpal::wrkgp 1 0.00% 96.92% # number of callpals executed
system.cpu.kern.callpal::wrusp 7 0.00% 96.92% # number of callpals executed
system.cpu.kern.callpal::rdusp 9 0.00% 96.93% # number of callpals executed
system.cpu.kern.callpal::whami 2 0.00% 96.93% # number of callpals executed
system.cpu.kern.callpal::rti 5203 2.71% 99.64% # number of callpals executed
system.cpu.kern.callpal::callsys 515 0.27% 99.91% # number of callpals executed
system.cpu.kern.callpal::imb 181 0.09% 100.00% # number of callpals executed
system.cpu.kern.callpal::total 192177 # number of callpals executed
system.cpu.kern.mode_switch::kernel 5948 # number of protection mode switches
system.cpu.kern.mode_switch::user 1735 # number of protection mode switches
system.cpu.kern.mode_switch::idle 2098 # number of protection mode switches
system.cpu.kern.mode_good::kernel 1906
system.cpu.kern.mode_good::user 1735
system.cpu.kern.mode_good::idle 171
system.cpu.kern.mode_switch_good::kernel 0.320444 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good::idle 0.081506 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good::total 0.389735 # fraction of useful protection mode switches
system.cpu.kern.mode_ticks::kernel 26832734500 1.47% 1.47% # number of ticks spent at the given mode
system.cpu.kern.mode_ticks::user 1465059000 0.08% 1.55% # number of ticks spent at the given mode
system.cpu.kern.mode_ticks::idle 1801032591000 98.45% 100.00% # number of ticks spent at the given mode
system.cpu.kern.swap_context 4178 # number of times the context was actually changed
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post
system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post
system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post
system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post
system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post
system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
system.cpu.icache.replacements 919577 # number of replacements
system.cpu.icache.tagsinuse 511.215229 # Cycle average of tags in use
system.cpu.icache.total_refs 59129371 # Total number of references to valid blocks.
system.cpu.icache.sampled_refs 920089 # Sample count of references to valid blocks.
system.cpu.icache.avg_refs 64.264839 # Average number of references to valid blocks.
system.cpu.icache.warmup_cycle 9686972500 # Cycle when the warmup percentage was hit.
system.cpu.icache.occ_blocks::cpu.inst 511.215229 # Average occupied blocks per requestor
system.cpu.icache.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy
system.cpu.icache.occ_percent::total 0.998467 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 59129371 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 59129371 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 59129371 # number of demand (read+write) hits
system.cpu.icache.demand_hits::total 59129371 # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst 59129371 # number of overall hits
system.cpu.icache.overall_hits::total 59129371 # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst 920204 # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total 920204 # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst 920204 # number of demand (read+write) misses
system.cpu.icache.demand_misses::total 920204 # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst 920204 # number of overall misses
system.cpu.icache.overall_misses::total 920204 # number of overall misses
system.cpu.icache.ReadReq_accesses::cpu.inst 60049575 # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total 60049575 # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst 60049575 # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total 60049575 # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst 60049575 # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total 60049575 # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.015324 # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total 0.015324 # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst 0.015324 # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total 0.015324 # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst 0.015324 # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total 0.015324 # miss rate for overall accesses
system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.l2cache.replacements 992297 # number of replacements
system.cpu.l2cache.tagsinuse 65424.375500 # Cycle average of tags in use
system.cpu.l2cache.total_refs 2433228 # Total number of references to valid blocks.
system.cpu.l2cache.sampled_refs 1057460 # Sample count of references to valid blocks.
system.cpu.l2cache.avg_refs 2.301012 # Average number of references to valid blocks.
system.cpu.l2cache.warmup_cycle 614754000 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.occ_blocks::writebacks 56309.097197 # Average occupied blocks per requestor
system.cpu.l2cache.occ_blocks::cpu.inst 4867.351143 # Average occupied blocks per requestor
system.cpu.l2cache.occ_blocks::cpu.data 4247.927159 # Average occupied blocks per requestor
system.cpu.l2cache.occ_percent::writebacks 0.859209 # Average percentage of cache occupancy
system.cpu.l2cache.occ_percent::cpu.inst 0.074270 # Average percentage of cache occupancy
system.cpu.l2cache.occ_percent::cpu.data 0.064818 # Average percentage of cache occupancy
system.cpu.l2cache.occ_percent::total 0.998297 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 906782 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 811231 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1718013 # number of ReadReq hits
system.cpu.l2cache.Writeback_hits::writebacks 833491 # number of Writeback hits
system.cpu.l2cache.Writeback_hits::total 833491 # number of Writeback hits
system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits
system.cpu.l2cache.UpgradeReq_hits::total 4 # number of UpgradeReq hits
system.cpu.l2cache.ReadExReq_hits::cpu.data 187234 # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total 187234 # number of ReadExReq hits
system.cpu.l2cache.demand_hits::cpu.inst 906782 # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.data 998465 # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total 1905247 # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.inst 906782 # number of overall hits
system.cpu.l2cache.overall_hits::cpu.data 998465 # number of overall hits
system.cpu.l2cache.overall_hits::total 1905247 # number of overall hits
system.cpu.l2cache.ReadReq_misses::cpu.inst 13404 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::cpu.data 927640 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::total 941044 # number of ReadReq misses
system.cpu.l2cache.UpgradeReq_misses::cpu.data 12 # number of UpgradeReq misses
system.cpu.l2cache.UpgradeReq_misses::total 12 # number of UpgradeReq misses
system.cpu.l2cache.ReadExReq_misses::cpu.data 117115 # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total 117115 # number of ReadExReq misses
system.cpu.l2cache.demand_misses::cpu.inst 13404 # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data 1044755 # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total 1058159 # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.inst 13404 # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data 1044755 # number of overall misses
system.cpu.l2cache.overall_misses::total 1058159 # number of overall misses
system.cpu.l2cache.ReadReq_accesses::cpu.inst 920186 # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.ReadReq_accesses::cpu.data 1738871 # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.ReadReq_accesses::total 2659057 # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::writebacks 833491 # number of Writeback accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::total 833491 # number of Writeback accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::cpu.data 16 # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::total 16 # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data 304349 # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total 304349 # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.inst 920186 # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data 2043220 # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total 2963406 # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst 920186 # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data 2043220 # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total 2963406 # number of overall (read+write) accesses
system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.014567 # miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.533473 # miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_miss_rate::total 0.353901 # miss rate for ReadReq accesses
system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.750000 # miss rate for UpgradeReq accesses
system.cpu.l2cache.UpgradeReq_miss_rate::total 0.750000 # miss rate for UpgradeReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.384805 # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total 0.384805 # miss rate for ReadExReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst 0.014567 # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data 0.511328 # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total 0.357075 # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst 0.014567 # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data 0.511328 # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total 0.357075 # miss rate for overall accesses
system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks 74287 # number of writebacks
system.cpu.l2cache.writebacks::total 74287 # number of writebacks
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.dcache.replacements 2042707 # number of replacements
system.cpu.dcache.tagsinuse 511.997802 # Cycle average of tags in use
system.cpu.dcache.total_refs 14038405 # Total number of references to valid blocks.
system.cpu.dcache.sampled_refs 2043219 # Sample count of references to valid blocks.
system.cpu.dcache.avg_refs 6.870729 # Average number of references to valid blocks.
system.cpu.dcache.warmup_cycle 10840000 # Cycle when the warmup percentage was hit.
system.cpu.dcache.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor
system.cpu.dcache.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy
system.cpu.dcache.occ_percent::total 0.999996 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 7807769 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 7807769 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 5848199 # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total 5848199 # number of WriteReq hits
system.cpu.dcache.LoadLockedReq_hits::cpu.data 183140 # number of LoadLockedReq hits
system.cpu.dcache.LoadLockedReq_hits::total 183140 # number of LoadLockedReq hits
system.cpu.dcache.StoreCondReq_hits::cpu.data 199281 # number of StoreCondReq hits
system.cpu.dcache.StoreCondReq_hits::total 199281 # number of StoreCondReq hits
system.cpu.dcache.demand_hits::cpu.data 13655968 # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total 13655968 # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data 13655968 # number of overall hits
system.cpu.dcache.overall_hits::total 13655968 # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data 1721709 # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total 1721709 # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data 304365 # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total 304365 # number of WriteReq misses
system.cpu.dcache.LoadLockedReq_misses::cpu.data 17162 # number of LoadLockedReq misses
system.cpu.dcache.LoadLockedReq_misses::total 17162 # number of LoadLockedReq misses
system.cpu.dcache.demand_misses::cpu.data 2026074 # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total 2026074 # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data 2026074 # number of overall misses
system.cpu.dcache.overall_misses::total 2026074 # number of overall misses
system.cpu.dcache.ReadReq_accesses::cpu.data 9529478 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total 9529478 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data 6152564 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total 6152564 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.LoadLockedReq_accesses::cpu.data 200302 # number of LoadLockedReq accesses(hits+misses)
system.cpu.dcache.LoadLockedReq_accesses::total 200302 # number of LoadLockedReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::cpu.data 199281 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::total 199281 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data 15682042 # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total 15682042 # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data 15682042 # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total 15682042 # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.180672 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.180672 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.049470 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total 0.049470 # miss rate for WriteReq accesses
system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.085681 # miss rate for LoadLockedReq accesses
system.cpu.dcache.LoadLockedReq_miss_rate::total 0.085681 # miss rate for LoadLockedReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data 0.129197 # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total 0.129197 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.129197 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.129197 # miss rate for overall accesses
system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.writebacks::writebacks 833491 # number of writebacks
system.cpu.dcache.writebacks::total 833491 # number of writebacks
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
---------- End Simulation Statistics ----------