abe7ef95cb
The headers declared in export_method_cxx_predecls are redundant since a SimObject's main header is automatically included. Change-Id: Ied9e84630b36960e54efe91d16f8c66fba7e0da0 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Joe Gross <joseph.gross@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
108 lines
4.9 KiB
Python
108 lines
4.9 KiB
Python
# Copyright (c) 2009, 2012-2013, 2015 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Ali Saidi
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from m5.params import *
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from System import System
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class ArmMachineType(Enum):
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map = {
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'RealViewEB' : 827,
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'RealViewPBX' : 1901,
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'VExpress_EMM' : 2272,
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'VExpress_EMM64' : 2272,
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'DTOnly' : -1,
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}
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class ArmSystem(System):
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type = 'ArmSystem'
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cxx_header = "arch/arm/system.hh"
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load_addr_mask = 0xffffffff
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multi_proc = Param.Bool(True, "Multiprocessor system?")
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boot_loader = VectorParam.String([],
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"File that contains the boot loader code. Zero or more files may be "
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"specified. The first boot loader that matches the kernel's "
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"architecture will be used.")
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gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
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flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
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have_security = Param.Bool(False,
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"True if Security Extensions are implemented")
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have_virtualization = Param.Bool(False,
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"True if Virtualization Extensions are implemented")
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have_lpae = Param.Bool(True, "True if LPAE is implemented")
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highest_el_is_64 = Param.Bool(False,
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"True if the register width of the highest implemented exception level "
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"is 64 bits (ARMv8)")
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reset_addr_64 = Param.Addr(0x0,
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"Reset address if the highest implemented exception level is 64 bits "
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"(ARMv8)")
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phys_addr_range_64 = Param.UInt8(40,
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"Supported physical address range in bits when using AArch64 (ARMv8)")
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have_large_asid_64 = Param.Bool(False,
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"True if ASID is 16 bits in AArch64 (ARMv8)")
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class GenericArmSystem(ArmSystem):
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type = 'GenericArmSystem'
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cxx_header = "arch/arm/system.hh"
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load_addr_mask = 0x0fffffff
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machine_type = Param.ArmMachineType('VExpress_EMM',
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"Machine id from http://www.arm.linux.org.uk/developer/machines/")
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atags_addr = Param.Addr("Address where default atags structure should " \
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"be written")
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dtb_filename = Param.String("",
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"File that contains the Device Tree Blob. Don't use DTB if empty.")
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early_kernel_symbols = Param.Bool(False,
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"enable early kernel symbol tables before MMU")
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enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries")
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panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \
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"guest kernel panics")
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panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
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"guest kernel oopses")
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class LinuxArmSystem(GenericArmSystem):
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type = 'LinuxArmSystem'
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cxx_header = "arch/arm/linux/system.hh"
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@classmethod
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def export_methods(cls, code):
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code('''void dumpDmesg();''')
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class FreebsdArmSystem(GenericArmSystem):
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type = 'FreebsdArmSystem'
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cxx_header = "arch/arm/freebsd/system.hh"
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