123 lines
3.8 KiB
C++
123 lines
3.8 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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* Ali Saidi
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*/
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#ifndef __ARCH_SPARC_REGFILE_HH__
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#define __ARCH_SPARC_REGFILE_HH__
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#include "arch/sparc/faults.hh"
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#include "arch/sparc/floatregfile.hh"
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#include "arch/sparc/intregfile.hh"
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#include "arch/sparc/isa_traits.hh"
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#include "arch/sparc/miscregfile.hh"
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#include "arch/sparc/types.hh"
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#include "sim/host.hh"
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#include <string>
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class Checkpoint;
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namespace SparcISA
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{
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class RegFile
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{
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protected:
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Addr pc; // Program Counter
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Addr npc; // Next Program Counter
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Addr nnpc;
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public:
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Addr readPC();
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void setPC(Addr val);
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Addr readNextPC();
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void setNextPC(Addr val);
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Addr readNextNPC();
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void setNextNPC(Addr val);
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protected:
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IntRegFile intRegFile; // integer register file
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FloatRegFile floatRegFile; // floating point register file
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MiscRegFile miscRegFile; // control register file
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public:
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void clear();
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int FlattenIntIndex(int reg);
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MiscReg readMiscReg(int miscReg);
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MiscReg readMiscRegWithEffect(int miscReg,
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Fault &fault, ThreadContext *tc);
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Fault setMiscReg(int miscReg, const MiscReg &val);
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Fault setMiscRegWithEffect(int miscReg, const MiscReg &val,
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ThreadContext * tc);
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FloatReg readFloatReg(int floatReg, int width);
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FloatReg readFloatReg(int floatReg);
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FloatRegBits readFloatRegBits(int floatReg, int width);
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FloatRegBits readFloatRegBits(int floatReg);
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Fault setFloatReg(int floatReg, const FloatReg &val, int width);
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Fault setFloatReg(int floatReg, const FloatReg &val);
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Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width);
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Fault setFloatRegBits(int floatReg, const FloatRegBits &val);
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IntReg readIntReg(int intReg);
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Fault setIntReg(int intReg, const IntReg &val);
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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public:
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void changeContext(RegContextParam param, RegContextVal val);
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};
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void copyRegs(ThreadContext *src, ThreadContext *dest);
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void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
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int InterruptLevel(uint64_t softint);
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} // namespace SparcISA
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#endif
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