333eb4efea
src/arch/sparc/SConscript:
Added a file that implements ASI utility functions. These don't go in utility.hh because they aren't supposed to be part of the generic ISA interface.
src/arch/sparc/asi.hh:
Fixed up some mistranscriptions, and added function prototypes for some ASI utility functions.
src/arch/sparc/asi.cc:
Implementation of some ASI utility functions.
--HG--
extra : convert_revision : 8021007027b13e91cc66908029470da49a8ca11f
222 lines
7.9 KiB
C++
222 lines
7.9 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_SPARC_ASI_HH__
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#define __ARCH_SPARC_ASI_HH__
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namespace SparcISA
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{
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enum ASI {
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/* Priveleged ASIs */
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//0x00-0x03 implementation dependent
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ASI_NUCLEUS = 0x4,
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ASI_N = 0x4,
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//0x05-0x0B implementation dependent
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ASI_NL = 0xC,
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ASI_NUCLEUS_LITTLE = ASI_NL,
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//0x0D-0x0F implementation dependent
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ASI_AIUP = 0x10,
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ASI_AS_IF_USER_PRIMARY = ASI_AIUP,
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ASI_AIUS = 0x11,
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ASI_AS_IF_USER_SECONDARY = ASI_AIUS,
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//0x12-0x13 implementation dependent
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ASI_REAL = 0x14,
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ASI_REAL_IO = 0x15,
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ASI_BLK_AIUP = 0x16,
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ASI_BLOCK_AS_IF_USER_PRIMARY = ASI_BLK_AIUP,
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ASI_BLK_AIUS = 0x17,
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ASI_BLOCK_AS_IF_USER_SECONDARY = ASI_BLK_AIUS,
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ASI_AIUPL = 0x18,
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ASI_AS_IF_USER_PRIMARY_LITTLE = ASI_AIUPL,
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ASI_AIUSL = 0x19,
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ASI_AS_IF_USER_SECONDARY_LITTLE = ASI_AIUSL,
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//0x1A-0x1B implementation dependent
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ASI_REAL_L = 0x1C,
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ASI_REAL_LITTLE = ASI_REAL_L,
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ASI_REAL_IO_L = 0x1D,
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ASI_REAL_IO_LITTLE = ASI_REAL_IO_L,
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ASI_BLK_AIUPL = 0x1E,
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ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE = ASI_BLK_AIUPL,
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ASI_BLK_AIUSL = 0x1F,
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ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE = ASI_BLK_AIUSL,
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ASI_SCRATCHPAD = 0x20,
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ASI_MMU_CONTEXTID = 0x21,
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ASI_LDTX_AIUP = 0x22,
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ASI_LD_TWINX_AS_IF_USER_PRIMARY = ASI_LDTX_AIUP,
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ASI_LDTX_AIUS = 0x23,
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ASI_LD_TWINX_AS_IF_USER_SECONDARY = ASI_LDTX_AIUS,
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//0x24 implementation dependent
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ASI_QUEUE = 0x25,
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ASI_LDTX_REAL = 0x26,
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ASI_LD_TWINX_REAL = ASI_LDTX_REAL,
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ASI_LDTX_N = 0x27,
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ASI_LD_TWINX_NUCLEUS = ASI_LDTX_N,
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//0x28-0x29 implementation dependent
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ASI_LDTX_AIUPL = 0x2A,
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ASI_LD_TWINX_AS_IF_USER_PRIMARY_LITTLE = ASI_LDTX_AIUPL,
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ASI_LDTX_AIUSL = 0x2B,
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ASI_LD_TWINX_AS_IF_USER_SECONDARY_LITTLE = ASI_LDTX_AIUSL,
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//0x2C-0x2D implementation dependent
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ASI_LDTX_REAL_L = 0x2E,
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ASI_LD_TWINX_REAL_LITTLE = ASI_LDTX_REAL_L,
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ASI_LDTX_NL = 0x2F,
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ASI_LD_TWINX_NUCLEUS_LITTLE = ASI_LDTX_NL,
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//0x30-0x40 implementation dependent
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ASI_CMT_SHARED = 0x41,
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//0x42-0x4F implementation dependent
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ASI_HYP_SCRATCHPAD = 0x4F,
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ASI_IMMU = 0x50,
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ASI_MMU_REAL = 0x52,
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//0x53 implementation dependent
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ASI_MMU = 0x54,
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ASI_ITLB_DATA_ACCESS_REG = 0x55,
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ASI_ITLB_TAG_READ_REG = 0x56,
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ASI_IMMU_DEMAP = 0x57,
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ASI_DMMU = 0x58,
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ASI_UMMU = 0x58,
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//0x59-0x5B reserved
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ASI_DTLB_DATA_IN_REG = 0x5C,
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ASI_DTLB_DATA_ACCESS_REG = 0x5D,
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ASI_DTLB_TAG_READ_REG = 0x5E,
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ASI_DMMU_DEMAP = 0x5F,
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//0x60-62 implementation dependent
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ASI_CMT_PER_STRAND = 0x63,
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//0x64-0x67 implementation dependent
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//0x68-0x7F reserved
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/* Unpriveleged ASIs */
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ASI_P = 0x80,
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ASI_PRIMARY = ASI_P,
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ASI_S = 0x81,
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ASI_SECONDARY = ASI_S,
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ASI_PNF = 0x82,
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ASI_PRIMARY_NO_FAULT = ASI_PNF,
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ASI_SNF = 0x83,
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ASI_SECONDARY_NO_FAULT = ASI_SNF,
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//0x84-0x87 reserved
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ASI_PL = 0x88,
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ASI_PRIMARY_LITTLE = ASI_PL,
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ASI_SL = 0x89,
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ASI_SECONDARY_LITTLE = ASI_SL,
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ASI_PNFL = 0x8A,
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ASI_PRIMARY_NO_FAULT_LITTLE = ASI_PNFL,
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ASI_SNFL = 0x8B,
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ASI_SECONDARY_NO_FAULT_LITTLE = ASI_SNFL,
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//0x8C-0xBF reserved
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ASI_PST8_P = 0xC0,
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ASI_PST8_PRIMARY = ASI_PST8_P,
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ASI_PST8_S = 0xC1,
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ASI_PST8_SECONDARY = ASI_PST8_S,
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ASI_PST16_P = 0xC2,
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ASI_PST16_PRIMARY = ASI_PST16_P,
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ASI_PST16_S = 0xC3,
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ASI_PST16_SECONDARY = ASI_PST16_S,
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ASI_PST32_P = 0xC4,
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ASI_PST32_PRIMARY = ASI_PST32_P,
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ASI_PST32_S = 0xC5,
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ASI_PST32_SECONDARY = ASI_PST32_S,
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//0xC6-0xC7 implementation dependent
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ASI_PST8_PL = 0xC8,
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ASI_PST8_PRIMARY_LITTLE = ASI_PST8_PL,
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ASI_PST8_SL = 0xC9,
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ASI_PST8_SECONDARY_LITTLE = ASI_PST8_SL,
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ASI_PST16_PL = 0xCA,
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ASI_PST16_PRIMARY_LITTLE = ASI_PST16_PL,
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ASI_PST16_SL = 0xCB,
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ASI_PST16_SECONDARY_LITTLE = ASI_PST16_SL,
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ASI_PST32_PL = 0xCC,
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ASI_PST32_PRIMARY_LITTLE = ASI_PST32_PL,
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ASI_PST32_SL = 0xCD,
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ASI_PST32_SECONDARY_LITTLE = ASI_PST32_SL,
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//0xCE-0xCF implementation dependent
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ASI_FL8_P = 0xD0,
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ASI_FL8_PRIMARY = ASI_FL8_P,
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ASI_FL8_S = 0xD1,
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ASI_FL8_SECONDARY = ASI_FL8_S,
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ASI_FL16_P = 0xD2,
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ASI_FL16_PRIMARY = ASI_FL16_P,
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ASI_FL16_S = 0xD3,
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ASI_FL16_SECONDARY = ASI_FL16_S,
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//0xD4-0xD7 implementation dependent
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ASI_FL8_PL = 0xD8,
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ASI_FL8_PRIMARY_LITTLE = ASI_FL8_PL,
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ASI_FL8_SL = 0xD9,
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ASI_FL8_SECONDARY_LITTLE = ASI_FL8_SL,
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ASI_FL16_PL = 0xDA,
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ASI_FL16_PRIMARY_LITTLE = ASI_FL16_PL,
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ASI_FL16_SL = 0xDB,
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ASI_FL16_SECONDARY_LITTLE = ASI_FL16_SL,
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//0xDC-0xDF implementation dependent
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//0xE0-0xE1 reserved
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ASI_LDTX_P = 0xE2,
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ASI_LD_TWINX_PRIMARY = ASI_LDTX_P,
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ASI_LDTX_S = 0xE3,
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ASI_LD_TWINX_SECONDARY = ASI_LDTX_S,
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//0xE4-0xE9 implementation dependent
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ASI_LDTX_PL = 0xEA,
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ASI_LD_TWINX_PRIMARY_LITTLE = ASI_LDTX_PL,
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ASI_LDTX_SL = 0xEB,
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ASI_LD_TWINX_SECONDARY_LITTLE = ASI_LDTX_SL,
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//0xEC-0xEF implementation dependent
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ASI_BLK_P = 0xF0,
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ASI_BLOCK_PRIMARY = ASI_BLK_P,
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ASI_BLK_S = 0xF1,
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ASI_BLOCK_SECONDARY = ASI_BLK_S,
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//0xF2-0xF7 implementation dependent
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ASI_BLK_PL = 0xF8,
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ASI_BLOCK_PRIMARY_LITTLE = ASI_BLK_PL,
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ASI_BLK_SL = 0xF9,
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ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL,
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//0xFA-0xFF implementation dependent
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MAX_ASI = 0xFF
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};
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//Functions that classify an asi
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bool AsiIsBlock(ASI);
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bool AsiIsPrimary(ASI);
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bool AsiIsSecondary(ASI);
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bool AsiIsNucleus(ASI);
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bool AsiIsAsIfUser(ASI);
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bool AsiIsIO(ASI);
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bool AsiIsReal(ASI);
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bool AsiIsLittle(ASI);
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bool AsiIsTwin(ASI);
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bool AsiIsPartialStore(ASI);
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bool AsiIsFloatingLoad(ASI);
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bool AsiIsNoFault(ASI);
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bool AsiIsScratchPad(ASI);
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bool AsiIsCmt(ASI);
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bool AsiIsQueue(ASI);
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bool AsiIsDtlb(ASI);
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bool AsiIsMmu(ASI);
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};
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#endif // __ARCH_SPARC_TLB_HH__
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