gem5/arch/alpha
Kevin Lim 61d95de4c8 Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version.
SConscript:
arch/isa_parser.py:
cpu/base_dyn_inst.cc:
    Remove OOO CPU stuff.
arch/alpha/faults.hh:
    Add fake memory fault.  This will be removed eventually.
arch/alpha/isa_desc:
    Change EA comp and Mem accessor to be const StaticInstPtrs.
cpu/base_dyn_inst.hh:
    Update read/write calls to use load queue and store queue indices.
cpu/beta_cpu/alpha_dyn_inst.hh:
    Change to const StaticInst in the register accessors.
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
    Update syscall code with thread numbers.
cpu/beta_cpu/alpha_full_cpu.hh:
    Alter some of the full system code so it will compile without errors.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
    Created a DerivAlphaFullCPU class so I can instantiate different CPUs that have different template parameters.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
    Update some of the full system code so it compiles.
cpu/beta_cpu/alpha_params.hh:
cpu/beta_cpu/fetch_impl.hh:
    Remove asid.
cpu/beta_cpu/comm.hh:
    Remove global history field.
cpu/beta_cpu/commit.hh:
    Comment out rename map.
cpu/beta_cpu/commit_impl.hh:
    Update some of the full system code so it compiles.  Also change it so that it handles memory instructions properly.
cpu/beta_cpu/cpu_policy.hh:
    Removed IQ from the IEW template parameter to make it more uniform.
cpu/beta_cpu/decode.hh:
    Add debug function.
cpu/beta_cpu/decode_impl.hh:
    Slight updates for decode in the case where it causes a squash.
cpu/beta_cpu/fetch.hh:
cpu/beta_cpu/rob.hh:
    Comment out unneccessary code.
cpu/beta_cpu/full_cpu.cc:
    Changed some of the full system code so it compiles.  Updated exec contexts and so forth to hopefully make multithreading easier.
cpu/beta_cpu/full_cpu.hh:
    Updated some of the full system code to make it compile.
cpu/beta_cpu/iew.cc:
    Removed IQ from template parameter to IEW.
cpu/beta_cpu/iew.hh:
    Removed IQ from template parameter to IEW. Updated IEW to recognize the Load/Store queue.
cpu/beta_cpu/iew_impl.hh:
    New handling of memory instructions through the Load/Store queue.
cpu/beta_cpu/inst_queue.hh:
    Updated comment.
cpu/beta_cpu/inst_queue_impl.hh:
    Slightly different handling of memory instructions due to Load/Store queue.
cpu/beta_cpu/regfile.hh:
    Updated full system code so it compiles.
cpu/beta_cpu/rob_impl.hh:
    Moved some code around; no major functional changes.
cpu/ooo_cpu/ooo_cpu.hh:
    Slight updates to OOO CPU; still does not work.
cpu/static_inst.hh:
    Remove OOO CPU stuff.  Change ea comp and mem acc to return const StaticInst.
kern/kernel_stats.hh:
    Extra forward declares added due to compile error.

--HG--
extra : convert_revision : 594a7cdbe57f6c2bda7d08856fcd864604a6238e
2005-05-03 10:56:47 -04:00
..
alpha_linux_process.cc Removed unecessary constructor call at each return. 2005-03-10 14:20:12 -05:00
alpha_linux_process.hh Formatting & doxygen docs for new syscall emulation code. 2003-12-01 22:39:27 -08:00
alpha_memory.cc Fix timing modeling of faults: functionally the very next instruction after 2005-02-25 12:41:08 -05:00
alpha_memory.hh Macros are nasty, so let's get rid of them. Convert all 2004-11-13 14:01:38 -05:00
alpha_tru64_process.cc Make code more portable and port to cygwin 2005-04-22 13:12:03 -04:00
alpha_tru64_process.hh Formatting & doxygen docs for new syscall emulation code. 2003-12-01 22:39:27 -08:00
aout_machdep.h Minor documentation tweaks. 2003-10-16 12:41:35 -07:00
arguments.cc in the arch/alpha directory we should use arch/alpha, not 2004-10-23 00:39:15 -04:00
arguments.hh in the arch/alpha directory we should use arch/alpha, not 2004-10-23 00:39:15 -04:00
ecoff_machdep.h New loader structure. Expand Nate's ObjectFile to automatically detect file formats 2003-10-07 23:13:01 -07:00
ev5.cc Make the notion of a global event tick independent of the actual 2005-04-11 15:32:06 -04:00
ev5.hh Macros are nasty, so let's get rid of them. Convert all 2004-11-13 14:01:38 -05:00
faults.cc in the arch/alpha directory we should use arch/alpha, not 2004-10-23 00:39:15 -04:00
faults.hh Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
isa_desc Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
isa_traits.hh Merge ktlim@zizzer.eecs.umich.edu:/bk/m5 2005-03-10 15:53:27 -05:00
osfpal.cc in the arch/alpha directory we should use arch/alpha, not 2004-10-23 00:39:15 -04:00
osfpal.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
pseudo_inst.cc Make code more portable and port to cygwin 2005-04-22 13:12:03 -04:00
pseudo_inst.hh added m5 debug and m5 switch cpu instruction (doesn't work yet) and 2004-08-02 17:10:02 -04:00
vptr.hh Fixes so m5 compiles on gcc 3.4, which has much stricter syntax. Most changes come from templated code, 2005-01-14 18:34:56 -05:00
vtophys.cc Macros are nasty, so let's get rid of them. Convert all 2004-11-13 14:01:38 -05:00
vtophys.hh get rid of pmap.h and make things variables and inline 2004-10-23 10:41:35 -04:00