gem5/src/arch/x86/isa/insts/general_purpose
2009-02-01 00:28:28 -08:00
..
arithmetic X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
compare_and_test X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
control_transfer X86: Fix a bug in the iret microcode. 2009-01-25 20:31:17 -08:00
data_conversion X86: Implement the bswap instruction. 2009-01-25 20:32:43 -08:00
data_transfer X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
flags X86: Implement and hook up STI and CLI instructions. 2008-06-12 00:58:19 -04:00
input_output X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
rotate_and_shift X86: Put ldst into the microcode (the earlier changeset didn't really). 2007-10-02 22:19:53 -07:00
string X86: Fix the microcode for the LODS instruction. 2009-02-01 00:28:28 -08:00
__init__.py X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
cache_and_memory_management.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
load_effective_address.py X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. 2007-09-19 18:25:17 -07:00
load_segment_registers.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
logical.py X86: Put ldst into the microcode (the earlier changeset didn't really). 2007-10-02 22:19:53 -07:00
no_operation.py X86: Fill out group17 in the decoder. 2008-01-21 16:27:40 -05:00
semaphores.py X86: Implement the xadd instruction. 2009-01-25 20:33:27 -08:00
system_calls.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00