Ali Saidi 09d8a1e125 Add a very poor implementation of dealing with retries on timing requests. It is especially slow with tracing on since ... it ends up being O(N^2). But it's probably going to have to change for the real bus anyway, so it should be rewritten then Change recvRetry() to not accept a packet. Sendtiming should be called again (and can respond with false or true) Removed Port Blocked/Unblocked and replaced with sendRetry(). Remove possibility of packet mangling if packet is going to be refused anyway in bridge src/cpu/simple/atomic.cc: src/cpu/simple/atomic.hh: src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: Change recvRetry() to not accept a packet. Sendtiming should be called again (and can respond with false or true) src/dev/io_device.cc: src/dev/io_device.hh: Make DMA Timing requests/responses work. Change recvRetry() to not accept a packet. Sendtiming should be called again (and can respond with false or true) src/mem/bridge.cc: src/mem/bridge.hh: Change recvRetry() to not accept a packet. Sendtiming should be called again (and can respond with false or true) Removed Port Blocked/Unblocked and replaced with sendRetry(). Remove posibility of packet mangling if packet is going to be refused anyway. src/mem/bus.cc: src/mem/bus.hh: Add a very poor implementation of dealing with retries on timing requests. It is especially slow with tracing on since it ends up being O(N^2). But it's probably going to have to change for the real bus anyway, so it should be rewritten then src/mem/port.hh: Change recvRetry() to not accept a packet. Sendtiming should be called again (and can respond with false or true) Removed Blocked/Unblocked port status, their functionality is really duplicated in the recvRetry() method --HG-- extra : convert_revision : fab613404be54bfa7a4c67572bae7b559169e573		2006-05-30 18:57:42 -04:00
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arch	commit a couple of minor things that I forgot to last time.	2006-05-29 18:25:02 -04:00
base	split off fullsystem and se iprs into two functions to remove lots of #ifs	2006-05-29 16:53:47 -04:00
cpu	Add a very poor implementation of dealing with retries on timing requests. It is especially slow with tracing on since	2006-05-30 18:57:42 -04:00
dev	Add a very poor implementation of dealing with retries on timing requests. It is especially slow with tracing on since	2006-05-30 18:57:42 -04:00
kern	New directory structure:	2006-05-22 14:29:33 -04:00
mem	Add a very poor implementation of dealing with retries on timing requests. It is especially slow with tracing on since	2006-05-30 18:57:42 -04:00
python	New directory structure:	2006-05-22 14:29:33 -04:00
sim	Add names to memory Port objects for tracing.	2006-05-26 13:48:35 -04:00
unittest	New directory structure:	2006-05-22 14:29:33 -04:00
Doxyfile	New directory structure:	2006-05-22 14:29:33 -04:00
SConscript	commit a couple of minor things that I forgot to last time.	2006-05-29 18:25:02 -04:00