Korey Sewell a4ed65d0fa Start working on more complex FP tests ... Debug FP instructions to handle these FP insts arch/mips/isa/bitfields.isa: add Bitfield for Floating Point Condition Codes arch/mips/isa/decoder.isa: Follow instruction naming style with FP single insts Send the float value to the convert&round functions in single FP add ll inst support add 'token' sc support arch/mips/isa_traits.cc: Add SINGLE->WORD, WORD->SINGLE, & WORD->DOUBLE conversions arch/mips/regfile.hh: update header files arch/mips/regfile/float_regfile.hh: Add more FP registers --HG-- rename : arch/mips/int_regfile.hh => arch/mips/regfile/int_regfile.hh rename : arch/mips/misc_regfile.hh => arch/mips/regfile/misc_regfile.hh extra : convert_revision : 92faf0bfd8542ade762ac569ec158d198f6a9c7e		2006-05-08 03:59:40 -04:00
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alpha	Add SparcSystem object	2006-04-28 15:34:03 -04:00
mips	Start working on more complex FP tests	2006-05-08 03:59:40 -04:00
sparc	move code from packet.hh to packet.cc and packet_impl.hh	2006-05-01 18:53:28 -04:00
isa_parser.py	recognized 32 & 64 bit unsigned integer types and set the width appropriately	2006-05-04 20:49:24 -04:00
isa_specific.hh	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
SConscript	Make .isa-file ##include file paths relative to including file.	2006-03-28 22:29:42 -05:00