Dam Sunwoo 2c1e344313 cpu: generate SimPoint basic block vector profiles ... This patch is based on http://reviews.m5sim.org/r/1474/ originally written by Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout folder) based on start and end addresses of basic blocks. Some comments to the original patch are addressed and hooks are added to create and resume from checkpoints based on instruction counts dictated by external SimPoint analysis tools. SimPoint creation/resuming options will be implemented as a separate patch.		2013-04-22 13:20:31 -04:00
..
Benchmarks.py	configs: add run scripts for ics/gb versions of android and bbench	2012-06-11 11:07:42 -04:00
CacheConfig.py	config: Remove O3 dependencies	2013-02-15 17:40:08 -05:00
Caches.py	config: Unify caches used in regressions and adjust L2 MSHRs	2012-10-30 07:44:08 -04:00
cpu2000.py	cpu2000: Add missing art benchmark to all	2012-01-09 18:08:20 -06:00
CpuConfig.py	config: Cleanup CPU configuration	2013-02-15 17:40:08 -05:00
FSConfig.py	x86: create space in bios memory map	2013-03-28 09:34:15 -05:00
O3_ARM_v7a.py	branch predictor: move out of o3 and inorder cpus	2013-01-24 12:28:51 -06:00
Options.py	cpu: generate SimPoint basic block vector profiles	2013-04-22 13:20:31 -04:00
Simulation.py	Configs: Fix handling of maxtick and take_checkpoints	2013-04-09 16:25:30 -05:00
SysPaths.py	make rcS files read from the m5 source directory, not /dist.	2006-11-08 14:10:25 -05:00