Korey Sewell a183f66a8a Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template) ... Have FP conversion instructions use re-defined convert_and_round() function arch/mips/isa/decoder.isa: Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template) Have FP conversion instructions to use re-defined convert_and_round() function arch/mips/isa/formats/util.isa: Remove convert_and_round function from here arch/mips/isa_traits.cc: Define convert_and_round function here arch/mips/isa_traits.hh: Use "enums" to define FP conversion types & Round Modes Declare convert_and_round function here --HG-- extra : convert_revision : 0f4f8c1732a53b277361559ea71af2a1feb4fc64		2006-04-28 00:24:25 -04:00
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alpha	Merge m5.eecs.umich.edu:/bk/newmem	2006-04-18 09:44:45 -04:00
mips	Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)	2006-04-28 00:24:25 -04:00
sparc	Merge m5.eecs.umich.edu:/bk/newmem	2006-04-18 09:44:45 -04:00
isa_parser.py	change readPC() + 4 to readNextPC() and the same for NNPC ...	2006-04-27 16:44:12 -04:00
isa_specific.hh	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
SConscript	Make .isa-file ##include file paths relative to including file.	2006-03-28 22:29:42 -05:00