Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
17 lines
810 B
Text
Executable file
17 lines
810 B
Text
Executable file
Redirecting stdout to build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing/simout
|
|
Redirecting stderr to build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing/simerr
|
|
M5 Simulator System
|
|
|
|
Copyright (c) 2001-2008
|
|
The Regents of The University of Michigan
|
|
All Rights Reserved
|
|
|
|
|
|
M5 compiled Aug 26 2010 13:03:41
|
|
M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix
|
|
M5 started Aug 26 2010 13:05:08
|
|
M5 executing on zizzer
|
|
command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing
|
|
Global frequency set at 1000000000000 ticks per second
|
|
info: Entering event queue @ 0. Starting simulation...
|
|
Hello World!Exiting @ tick 28206000 because target called exit()
|