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until the cache access occurs. The fundamental problem is that a subsequent read that occurs functionally will get a functionally incorrect result that can break driver code. dev/ns_gige.cc: dev/ns_gige.hh: dev/sinic.cc: dev/sinic.hh: get rid of pio_delay write and the associated code to move the write to the cache access function dev/sinicreg.hh: no more write delays python/m5/objects/Ethernet.py: get rid of pio_delay write --HG-- extra : convert_revision : 1dcb51b8f4514e717bc334a782dfdf06d29ae69d |
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