a4799a89de
SConscript:
changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
MIPS fault.cc file
arch/mips/faults.hh:
MIPS fault.hh file
--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
147 lines
4.6 KiB
C++
147 lines
4.6 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/mips/isa_traits.hh"
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#include "config/full_system.hh"
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#include "cpu/static_inst.hh"
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#include "sim/serialize.hh"
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using namespace MipsISA;
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const Addr MipsISA::PageShift = 13;
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const Addr MipsISA::PageBytes = ULL(1) << PageShift;
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const Addr MipsISA::PageMask = ~(PageBytes - 1);
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const Addr MipsISA::PageOffset = PageBytes - 1;
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#if FULL_SYSTEM
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////////////////////////////////////////////////////////////////////////
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//
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// Translation stuff
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//
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const Addr MipsISA::PteShift = 3;
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const Addr MipsISA::NPtePageShift = PageShift - PteShift;
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const Addr MipsISA::NPtePage = ULL(1) << NPtePageShift;
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const Addr MipsISA::PteMask = NPtePage - 1;
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// User Virtual
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const Addr MipsISA::USegBase = ULL(0x0);
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const Addr MipsISA::USegEnd = ULL(0x000003ffffffffff);
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// Kernel Direct Mapped
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const Addr MipsISA::K0SegBase = ULL(0xfffffc0000000000);
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const Addr MipsISA::K0SegEnd = ULL(0xfffffdffffffffff);
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// Kernel Virtual
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const Addr MipsISA::K1SegBase = ULL(0xfffffe0000000000);
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const Addr MipsISA::K1SegEnd = ULL(0xffffffffffffffff);
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#endif
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// Mips UNOP (ldq_u r31,0(r0))
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const MachInst MipsISA::NoopMachInst = 0x2ffe0000;
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static inline Addr
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TruncPage(Addr addr)
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{ return addr & ~(MipsISA::PageBytes - 1); }
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static inline Addr
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RoundPage(Addr addr)
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{ return (addr + MipsISA::PageBytes - 1) & ~(MipsISA::PageBytes - 1); }
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void
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RegFile::serialize(std::ostream &os)
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{
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SERIALIZE_ARRAY(intRegFile, NumIntRegs);
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SERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs);
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SERIALIZE_SCALAR(miscRegs.fpcr);
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SERIALIZE_SCALAR(miscRegs.uniq);
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SERIALIZE_SCALAR(miscRegs.lock_flag);
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SERIALIZE_SCALAR(miscRegs.lock_addr);
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SERIALIZE_SCALAR(pc);
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SERIALIZE_SCALAR(npc);
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#if FULL_SYSTEM
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SERIALIZE_ARRAY(palregs, NumIntRegs);
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SERIALIZE_ARRAY(ipr, NumInternalProcRegs);
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SERIALIZE_SCALAR(intrflag);
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SERIALIZE_SCALAR(pal_shadow);
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#endif
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}
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void
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RegFile::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ARRAY(intRegFile, NumIntRegs);
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UNSERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs);
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UNSERIALIZE_SCALAR(miscRegs.fpcr);
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UNSERIALIZE_SCALAR(miscRegs.uniq);
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UNSERIALIZE_SCALAR(miscRegs.lock_flag);
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UNSERIALIZE_SCALAR(miscRegs.lock_addr);
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UNSERIALIZE_SCALAR(pc);
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UNSERIALIZE_SCALAR(npc);
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#if FULL_SYSTEM
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UNSERIALIZE_ARRAY(palregs, NumIntRegs);
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UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs);
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UNSERIALIZE_SCALAR(intrflag);
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UNSERIALIZE_SCALAR(pal_shadow);
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#endif
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}
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#if FULL_SYSTEM
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void
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PTE::serialize(std::ostream &os)
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{
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SERIALIZE_SCALAR(tag);
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SERIALIZE_SCALAR(ppn);
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SERIALIZE_SCALAR(xre);
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SERIALIZE_SCALAR(xwe);
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SERIALIZE_SCALAR(asn);
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SERIALIZE_SCALAR(asma);
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SERIALIZE_SCALAR(fonr);
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SERIALIZE_SCALAR(fonw);
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SERIALIZE_SCALAR(valid);
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}
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void
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PTE::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_SCALAR(tag);
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UNSERIALIZE_SCALAR(ppn);
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UNSERIALIZE_SCALAR(xre);
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UNSERIALIZE_SCALAR(xwe);
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UNSERIALIZE_SCALAR(asn);
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UNSERIALIZE_SCALAR(asma);
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UNSERIALIZE_SCALAR(fonr);
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UNSERIALIZE_SCALAR(fonw);
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UNSERIALIZE_SCALAR(valid);
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}
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#endif //FULL_SYSTEM
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