gem5/src/arch
Andreas Hansson d7ad8dc608 Checkpoint: Make system serialize call children
This patch changes how the serialization of the system works. The base
class had a non-virtual serialize and unserialize, that was hidden by
a function with the same name for a number of subclasses (most likely
not intentional as the base class should have been virtual). A few of
the derived systems had no specialization at all (e.g. Power and x86
that simply called the System::serialize), but MIPS and Alpha adds
additional symbol table entries to the checkpoint.

Instead of overriding the virtual function, the additional entries are
now printed through a virtual function (un)serializeSymtab. The reason
for not calling System::serialize from the two related systems is that
a follow up patch will require the system to also serialize the
PhysicalMemory, and if this is done in the base class if ends up being
between the general parts and the specialized symbol table.

With this patch, the checkpoint is not modified, as the order of the
segments is unchanged.
2012-10-15 08:12:29 -04:00
..
alpha Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
arm Fix: Address a few minor issues identified by cppcheck 2012-10-15 08:12:23 -04:00
generic ISA,CPU: Generalize and split out the components of the decode cache. 2012-05-26 13:45:12 -07:00
mips Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
noisa cpu: add separate stats for insts/ops both globally and per cpu model 2012-02-12 16:07:39 -06:00
power Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
sparc Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
x86 Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
isa_parser.py O3: Clean up the O3 structures and try to pack them a bit better. 2012-06-05 01:23:09 -04:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript CPU: Merge the predecoder and decoder. 2012-05-26 13:44:46 -07:00