475 lines
17 KiB
C++
475 lines
17 KiB
C++
/*
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* Copyright (c) 2006-2007 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include <iostream>
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#include <errno.h>
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#include <sys/ptrace.h>
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#include <stdint.h>
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#include "tracechild_sparc.hh"
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using namespace std;
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string SparcTraceChild::regNames[numregs] = {
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//Global registers
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"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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//Output registers
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"o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",
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//Local registers
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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//Input registers
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"i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",
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//Floating point
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"f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
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"f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30",
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"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
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"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
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//Miscelaneous
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"fsr", "fprs", "pc", "npc", "y", "cwp", "pstate", "asi", "ccr"};
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int64_t getRegs(regs & myregs, fpu & myfpu,
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int64_t * locals, int64_t * inputs, int num)
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{
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assert(num < SparcTraceChild::numregs && num >= 0);
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switch(num)
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{
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//Global registers
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case SparcTraceChild::G0: return 0;
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case SparcTraceChild::G1: return myregs.r_g1;
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case SparcTraceChild::G2: return myregs.r_g2;
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case SparcTraceChild::G3: return myregs.r_g3;
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case SparcTraceChild::G4: return myregs.r_g4;
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case SparcTraceChild::G5: return myregs.r_g5;
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case SparcTraceChild::G6: return myregs.r_g6;
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case SparcTraceChild::G7: return myregs.r_g7;
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//Output registers
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case SparcTraceChild::O0: return myregs.r_o0;
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case SparcTraceChild::O1: return myregs.r_o1;
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case SparcTraceChild::O2: return myregs.r_o2;
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case SparcTraceChild::O3: return myregs.r_o3;
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case SparcTraceChild::O4: return myregs.r_o4;
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case SparcTraceChild::O5: return myregs.r_o5;
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case SparcTraceChild::O6: return myregs.r_o6;
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case SparcTraceChild::O7: return myregs.r_o7;
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//Local registers
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case SparcTraceChild::L0: return locals[0];
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case SparcTraceChild::L1: return locals[1];
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case SparcTraceChild::L2: return locals[2];
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case SparcTraceChild::L3: return locals[3];
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case SparcTraceChild::L4: return locals[4];
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case SparcTraceChild::L5: return locals[5];
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case SparcTraceChild::L6: return locals[6];
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case SparcTraceChild::L7: return locals[7];
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//Input registers
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case SparcTraceChild::I0: return inputs[0];
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case SparcTraceChild::I1: return inputs[1];
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case SparcTraceChild::I2: return inputs[2];
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case SparcTraceChild::I3: return inputs[3];
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case SparcTraceChild::I4: return inputs[4];
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case SparcTraceChild::I5: return inputs[5];
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case SparcTraceChild::I6: return inputs[6];
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case SparcTraceChild::I7: return inputs[7];
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//Floating point
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case SparcTraceChild::F0: return myfpu.f_fpstatus.fpu_fr[0];
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case SparcTraceChild::F2: return myfpu.f_fpstatus.fpu_fr[1];
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case SparcTraceChild::F4: return myfpu.f_fpstatus.fpu_fr[2];
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case SparcTraceChild::F6: return myfpu.f_fpstatus.fpu_fr[3];
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case SparcTraceChild::F8: return myfpu.f_fpstatus.fpu_fr[4];
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case SparcTraceChild::F10: return myfpu.f_fpstatus.fpu_fr[5];
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case SparcTraceChild::F12: return myfpu.f_fpstatus.fpu_fr[6];
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case SparcTraceChild::F14: return myfpu.f_fpstatus.fpu_fr[7];
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case SparcTraceChild::F16: return myfpu.f_fpstatus.fpu_fr[8];
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case SparcTraceChild::F18: return myfpu.f_fpstatus.fpu_fr[9];
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case SparcTraceChild::F20: return myfpu.f_fpstatus.fpu_fr[10];
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case SparcTraceChild::F22: return myfpu.f_fpstatus.fpu_fr[11];
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case SparcTraceChild::F24: return myfpu.f_fpstatus.fpu_fr[12];
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case SparcTraceChild::F26: return myfpu.f_fpstatus.fpu_fr[13];
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case SparcTraceChild::F28: return myfpu.f_fpstatus.fpu_fr[14];
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case SparcTraceChild::F30: return myfpu.f_fpstatus.fpu_fr[15];
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case SparcTraceChild::F32: return myfpu.f_fpstatus.fpu_fr[16];
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case SparcTraceChild::F34: return myfpu.f_fpstatus.fpu_fr[17];
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case SparcTraceChild::F36: return myfpu.f_fpstatus.fpu_fr[18];
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case SparcTraceChild::F38: return myfpu.f_fpstatus.fpu_fr[19];
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case SparcTraceChild::F40: return myfpu.f_fpstatus.fpu_fr[20];
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case SparcTraceChild::F42: return myfpu.f_fpstatus.fpu_fr[21];
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case SparcTraceChild::F44: return myfpu.f_fpstatus.fpu_fr[22];
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case SparcTraceChild::F46: return myfpu.f_fpstatus.fpu_fr[23];
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case SparcTraceChild::F48: return myfpu.f_fpstatus.fpu_fr[24];
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case SparcTraceChild::F50: return myfpu.f_fpstatus.fpu_fr[25];
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case SparcTraceChild::F52: return myfpu.f_fpstatus.fpu_fr[26];
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case SparcTraceChild::F54: return myfpu.f_fpstatus.fpu_fr[27];
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case SparcTraceChild::F56: return myfpu.f_fpstatus.fpu_fr[28];
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case SparcTraceChild::F58: return myfpu.f_fpstatus.fpu_fr[29];
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case SparcTraceChild::F60: return myfpu.f_fpstatus.fpu_fr[30];
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case SparcTraceChild::F62: return myfpu.f_fpstatus.fpu_fr[31];
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//Miscelaneous
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case SparcTraceChild::FSR: return myfpu.f_fpstatus.Fpu_fsr;
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case SparcTraceChild::FPRS: return myregs.r_fprs;
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case SparcTraceChild::PC: return myregs.r_tpc;
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case SparcTraceChild::NPC: return myregs.r_tnpc;
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case SparcTraceChild::Y: return myregs.r_y;
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case SparcTraceChild::CWP:
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return (myregs.r_tstate >> 0) & ((1 << 5) - 1);
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case SparcTraceChild::PSTATE:
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return (myregs.r_tstate >> 8) & ((1 << 13) - 1);
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case SparcTraceChild::ASI:
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return (myregs.r_tstate >> 24) & ((1 << 8) - 1);
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case SparcTraceChild::CCR:
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return (myregs.r_tstate >> 32) & ((1 << 8) - 1);
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default:
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assert(0);
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return 0;
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}
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}
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bool SparcTraceChild::update(int pid)
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{
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memcpy(&oldregs, &theregs, sizeof(regs));
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memcpy(&oldfpregs, &thefpregs, sizeof(fpu));
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memcpy(oldLocals, locals, 8 * sizeof(uint64_t));
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memcpy(oldInputs, inputs, 8 * sizeof(uint64_t));
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if(ptrace(PTRACE_GETREGS, pid, &theregs, 0) != 0)
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{
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cerr << "Update failed" << endl;
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return false;
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}
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uint64_t StackPointer = getSP();
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const int stackBias = (StackPointer % 1) ? 2047 : 0;
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for(unsigned int x = 0; x < 8; x++)
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{
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locals[x] = ptrace(PTRACE_PEEKTEXT, pid,
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StackPointer + stackBias + x * 8, 0);
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inputs[x] = ptrace(PTRACE_PEEKTEXT, pid,
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StackPointer + stackBias + x * 8 + (8 * 8), 0);
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}
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if(ptrace(PTRACE_GETFPREGS, pid, &thefpregs, 0) != 0)
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return false;
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for(unsigned int x = 0; x < numregs; x++)
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regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x));
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return true;
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}
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SparcTraceChild::SparcTraceChild()
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{
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for(unsigned int x = 0; x < numregs; x++)
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regDiffSinceUpdate[x] = false;
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}
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int SparcTraceChild::getTargets(uint32_t inst, uint64_t pc, uint64_t npc,
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uint64_t &target1, uint64_t &target2)
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{
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//We can identify the instruction categories we care about using the top
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//10 bits of the instruction, excluding the annul bit in the 3rd most
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//significant bit position and the condition field. We'll call these
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//bits the "sig" for signature.
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uint32_t sig = (inst >> 22) & 0x307;
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uint32_t cond = (inst >> 25) & 0xf;
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bool annul = (inst & (1 << 29));
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//Check if it's a ba...
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bool ba = (cond == 0x8) &&
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(sig == 0x1 || sig == 0x2 || sig == 0x5 || sig == 0x6);
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//or a bn...
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bool bn = (cond == 0x0) &&
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(sig == 0x1 || sig == 0x2 || sig == 0x5 || sig == 0x6);
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//or a bcc
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bool bcc = (cond & 0x7) &&
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(sig == 0x1 || sig == 0x2 || sig == 0x3 || sig == 0x5 || sig == 0x6);
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if(annul)
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{
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if(bcc)
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{
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target1 = npc;
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target2 = npc + 4;
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return 2;
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}
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else if(ba)
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{
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//This branches immediately to the effective address of the branch
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//which we'll have to calculate.
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uint64_t disp = 0;
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int64_t extender = 0;
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//Figure out how big the displacement field is, and grab the bits
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if(sig == 0x1 || sig == 0x5)
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{
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disp = inst & ((1 << 19) - 1);
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extender = 1 << 18;
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}
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else
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{
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disp = inst & ((1 << 22) - 1);
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extender = 1 << 21;
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}
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//This does sign extension, believe it or not.
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disp = (disp ^ extender) - extender;
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//Multiply the displacement by 4. I'm assuming the compiler is
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//smart enough to turn this into a shift.
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disp *= 4;
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target1 = pc + disp;
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}
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else if(bn)
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target1 = npc + 4;
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else
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target1 = npc;
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return 1;
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}
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else
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{
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target1 = npc;
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return 1;
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}
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}
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bool SparcTraceChild::step()
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{
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//Increment the count of the number of instructions executed
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instructions++;
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//Two important considerations are that the address of the instruction
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//being breakpointed should be word (64bit) aligned, and that both the
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//next instruction and the instruction after that need to be breakpointed
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//so that annulled branches will still stop as well.
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/*
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* Useful constants
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*/
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const static uint64_t breakInst = 0x91d02001;
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const static uint64_t lowBreakInst = breakInst;
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const static uint64_t highBreakInst = breakInst << 32;
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const static uint64_t breakWord = breakInst | (breakInst << 32);
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const static uint64_t lowMask = 0xFFFFFFFFULL;
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const static uint64_t highMask = lowMask << 32;
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/*
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* storage for the original contents of the child process's memory
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*/
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uint64_t originalInst, originalAnnulInst;
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/*
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* Get information about where the process is and is headed next.
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*/
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uint64_t currentPC = getRegVal(PC);
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bool unalignedPC = currentPC & 7;
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uint64_t alignedPC = currentPC & (~7);
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uint64_t nextPC = getRegVal(NPC);
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bool unalignedNPC = nextPC & 7;
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uint64_t alignedNPC = nextPC & (~7);
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//Get the current instruction
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uint64_t curInst = ptrace(PTRACE_PEEKTEXT, pid, alignedPC);
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curInst = unalignedPC ? (curInst & 0xffffffffULL) : (curInst >> 32);
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uint64_t bp1, bp2;
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int numTargets = getTargets(curInst, currentPC, nextPC, bp1, bp2);
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assert(numTargets == 1 || numTargets == 2);
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bool unalignedBp1 = bp1 & 7;
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uint64_t alignedBp1 = bp1 & (~7);
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bool unalignedBp2 = bp2 & 7;
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uint64_t alignedBp2 = bp2 & (~7);
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uint64_t origBp1, origBp2;
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/*
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* Set the first breakpoint
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*/
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origBp1 = ptrace(PTRACE_PEEKTEXT, pid, alignedBp1, 0);
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uint64_t newBp1 = origBp1;
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newBp1 &= unalignedBp1 ? highMask : lowMask;
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newBp1 |= unalignedBp1 ? lowBreakInst : highBreakInst;
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if(ptrace(PTRACE_POKETEXT, pid, alignedBp1, newBp1) != 0)
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cerr << "Poke failed" << endl;
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/*
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* Set the second breakpoint if necessary
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*/
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if(numTargets == 2)
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{
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origBp2 = ptrace(PTRACE_PEEKTEXT, pid, alignedBp2, 0);
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uint64_t newBp2 = origBp2;
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newBp2 &= unalignedBp2 ? highMask : lowMask;
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newBp2 |= unalignedBp2 ? lowBreakInst : highBreakInst;
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if(ptrace(PTRACE_POKETEXT, pid, alignedBp2, newBp2) != 0)
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cerr << "Poke failed" << endl;
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}
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/*
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* Restart the child process
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*/
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//Note that the "addr" parameter is supposed to be ignored, but in at
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//least one version of the kernel, it must be 1 or it will set what
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//pc to continue from
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if(ptrace(PTRACE_CONT, pid, 1, 0) != 0)
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cerr << "Cont failed" << endl;
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doWait();
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/*
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* Update our record of the child's state
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*/
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update(pid);
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/*
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* Put back the original contents of the childs address space in the
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* reverse order.
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*/
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if(numTargets == 2)
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{
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if(ptrace(PTRACE_POKETEXT, pid, alignedBp2, origBp2) != 0)
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cerr << "Poke failed" << endl;
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}
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if(ptrace(PTRACE_POKETEXT, pid, alignedBp1, origBp1) != 0)
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cerr << "Poke failed" << endl;
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}
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int64_t SparcTraceChild::getRegVal(int num)
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{
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return getRegs(theregs, thefpregs, locals, inputs, num);
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}
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int64_t SparcTraceChild::getOldRegVal(int num)
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{
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return getRegs(oldregs, oldfpregs, oldLocals, oldInputs, num);
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}
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char * SparcTraceChild::printReg(int num)
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{
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sprintf(printBuffer, "0x%016llx", getRegVal(num));
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return printBuffer;
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}
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ostream & SparcTraceChild::outputStartState(ostream & os)
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{
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bool v8 = false;
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uint64_t sp = getSP();
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if(sp % 1)
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{
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os << "Detected a 64 bit executable.\n";
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v8 = false;
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}
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else
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{
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os << "Detected a 32 bit executable.\n";
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v8 = true;
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}
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uint64_t pc = getPC();
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char obuf[1024];
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sprintf(obuf, "Initial stack pointer = 0x%016llx\n", sp);
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os << obuf;
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sprintf(obuf, "Initial program counter = 0x%016llx\n", pc);
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os << obuf;
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if(!v8)
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{
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//Take out the stack bias
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sp += 2047;
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}
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//Output the window save area
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for(unsigned int x = 0; x < 16; x++)
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{
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uint64_t regspot = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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if(v8) regspot = regspot >> 32;
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sprintf(obuf, "0x%016llx: Window save %d = 0x%016llx\n",
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sp, x+1, regspot);
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os << obuf;
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sp += v8 ? 4 : 8;
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}
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//Output the argument count
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uint64_t cargc = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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if(v8) cargc = cargc >> 32;
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sprintf(obuf, "0x%016llx: Argc = 0x%016llx\n", sp, cargc);
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os << obuf;
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sp += v8 ? 4 : 8;
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//Output argv pointers
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int argCount = 0;
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uint64_t cargv;
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do
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{
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cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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if(v8) cargv = cargv >> 32;
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sprintf(obuf, "0x%016llx: argv[%d] = 0x%016llx\n",
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sp, argCount++, cargv);
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os << obuf;
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sp += v8 ? 4 : 8;
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} while(cargv);
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//Output the envp pointers
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int envCount = 0;
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uint64_t cenvp;
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do
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{
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cenvp = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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if(v8) cenvp = cenvp >> 32;
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sprintf(obuf, "0x%016llx: envp[%d] = 0x%016llx\n",
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sp, envCount++, cenvp);
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os << obuf;
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sp += v8 ? 4 : 8;
|
|
} while(cenvp);
|
|
uint64_t auxType, auxVal;
|
|
do
|
|
{
|
|
auxType = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
|
|
if(v8) auxType = auxType >> 32;
|
|
sp += (v8 ? 4 : 8);
|
|
auxVal = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
|
|
if(v8) auxVal = auxVal >> 32;
|
|
sp += (v8 ? 4 : 8);
|
|
sprintf(obuf, "0x%016llx: Auxiliary vector = {0x%016llx, 0x%016llx}\n",
|
|
sp - 8, auxType, auxVal);
|
|
os << obuf;
|
|
} while(auxType != 0 || auxVal != 0);
|
|
//Print out the argument strings, environment strings, and file name.
|
|
string current;
|
|
uint64_t buf;
|
|
uint64_t currentStart = sp;
|
|
bool clearedInitialPadding = false;
|
|
do
|
|
{
|
|
buf = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
|
|
char * cbuf = (char *)&buf;
|
|
for(int x = 0; x < sizeof(uint32_t); x++)
|
|
{
|
|
if(cbuf[x])
|
|
current += cbuf[x];
|
|
else
|
|
{
|
|
sprintf(obuf, "0x%016llx: \"%s\"\n",
|
|
currentStart, current.c_str());
|
|
os << obuf;
|
|
current = "";
|
|
currentStart = sp + x + 1;
|
|
}
|
|
}
|
|
sp += (v8 ? 4 : 8);
|
|
clearedInitialPadding = clearedInitialPadding || buf != 0;
|
|
} while(!clearedInitialPadding || buf != 0);
|
|
return os;
|
|
}
|
|
|
|
TraceChild * genTraceChild()
|
|
{
|
|
return new SparcTraceChild;
|
|
}
|
|
|