712 lines
13 KiB
INI
712 lines
13 KiB
INI
[root]
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type=Root
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children=system
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eventq_index=0
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full_system=false
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sim_quantum=0
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time_sync_enable=false
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time_sync_period=100000000000
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time_sync_spin_threshold=100000000
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[system]
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type=System
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children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
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boot_osflags=a
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cache_line_size=64
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clk_domain=system.clk_domain
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eventq_index=0
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exit_on_work_items=false
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init_param=0
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kernel=
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kernel_addr_check=true
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load_addr_mask=1099511627775
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load_offset=0
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mem_mode=atomic
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mem_ranges=
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memories=system.physmem
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mmap_using_noreserve=false
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multi_thread=false
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num_work_ids=16
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readfile=
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symbolfile=
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work_begin_ckpt_count=0
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work_begin_cpu_id_exit=-1
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work_begin_exit_count=0
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work_cpus_ckpt_count=0
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work_end_ckpt_count=0
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work_end_exit_count=0
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work_item_id=-1
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system_port=system.membus.slave[0]
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[system.clk_domain]
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type=SrcClockDomain
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clock=1000
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domain_id=-1
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eventq_index=0
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init_perf_level=0
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voltage_domain=system.voltage_domain
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[system.cpu0]
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type=AtomicSimpleCPU
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children=dcache dtb icache interrupts isa itb tracer workload
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branchPred=Null
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checker=Null
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clk_domain=system.cpu_clk_domain
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cpu_id=0
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do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu0.dtb
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eventq_index=0
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fastmem=false
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function_trace=false
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function_trace_start=0
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interrupts=system.cpu0.interrupts
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isa=system.cpu0.isa
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itb=system.cpu0.itb
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max_insts_all_threads=0
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max_insts_any_thread=0
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max_loads_all_threads=0
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max_loads_any_thread=0
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numThreads=1
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profile=0
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progress_interval=0
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simpoint_start_insts=
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simulate_data_stalls=false
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simulate_inst_stalls=false
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socket_id=0
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switched_out=false
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system=system
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tracer=system.cpu0.tracer
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width=1
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workload=system.cpu0.workload
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dcache_port=system.cpu0.dcache.cpu_side
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icache_port=system.cpu0.icache.cpu_side
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[system.cpu0.dcache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=false
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu0.dcache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=false
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cpu_side=system.cpu0.dcache_port
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mem_side=system.toL2Bus.slave[1]
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[system.cpu0.dcache.tags]
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type=LRU
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assoc=4
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu0.dtb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu0.icache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=true
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu0.icache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=true
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cpu_side=system.cpu0.icache_port
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mem_side=system.toL2Bus.slave[0]
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[system.cpu0.icache.tags]
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type=LRU
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assoc=1
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu0.interrupts]
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type=SparcInterrupts
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eventq_index=0
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[system.cpu0.isa]
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type=SparcISA
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eventq_index=0
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[system.cpu0.itb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu0.tracer]
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type=ExeTracer
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eventq_index=0
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[system.cpu0.workload]
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type=LiveProcess
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cmd=test_atomic 4
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cwd=
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drivers=
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egid=100
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env=
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errout=cerr
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euid=100
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eventq_index=0
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executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
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gid=100
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input=cin
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kvmInSE=false
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max_stack_size=67108864
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output=cout
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pid=100
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ppid=99
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simpoint=0
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system=system
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uid=100
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useArchPT=false
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[system.cpu1]
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type=AtomicSimpleCPU
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children=dcache dtb icache interrupts isa itb tracer
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branchPred=Null
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checker=Null
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clk_domain=system.cpu_clk_domain
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cpu_id=1
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do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu1.dtb
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eventq_index=0
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fastmem=false
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function_trace=false
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function_trace_start=0
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interrupts=system.cpu1.interrupts
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isa=system.cpu1.isa
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itb=system.cpu1.itb
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max_insts_all_threads=0
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max_insts_any_thread=0
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max_loads_all_threads=0
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max_loads_any_thread=0
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numThreads=1
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profile=0
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progress_interval=0
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simpoint_start_insts=
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simulate_data_stalls=false
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simulate_inst_stalls=false
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socket_id=0
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switched_out=false
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system=system
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tracer=system.cpu1.tracer
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width=1
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workload=system.cpu0.workload
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dcache_port=system.cpu1.dcache.cpu_side
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icache_port=system.cpu1.icache.cpu_side
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[system.cpu1.dcache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=false
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu1.dcache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=false
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cpu_side=system.cpu1.dcache_port
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mem_side=system.toL2Bus.slave[3]
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[system.cpu1.dcache.tags]
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type=LRU
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assoc=4
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu1.dtb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu1.icache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=true
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu1.icache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=true
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cpu_side=system.cpu1.icache_port
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mem_side=system.toL2Bus.slave[2]
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[system.cpu1.icache.tags]
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type=LRU
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assoc=1
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu1.interrupts]
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type=SparcInterrupts
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eventq_index=0
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[system.cpu1.isa]
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type=SparcISA
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eventq_index=0
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[system.cpu1.itb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu1.tracer]
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type=ExeTracer
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eventq_index=0
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[system.cpu2]
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type=AtomicSimpleCPU
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children=dcache dtb icache interrupts isa itb tracer
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branchPred=Null
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checker=Null
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clk_domain=system.cpu_clk_domain
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cpu_id=2
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do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu2.dtb
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eventq_index=0
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fastmem=false
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function_trace=false
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function_trace_start=0
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interrupts=system.cpu2.interrupts
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isa=system.cpu2.isa
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itb=system.cpu2.itb
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max_insts_all_threads=0
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max_insts_any_thread=0
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max_loads_all_threads=0
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max_loads_any_thread=0
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numThreads=1
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profile=0
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progress_interval=0
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simpoint_start_insts=
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simulate_data_stalls=false
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simulate_inst_stalls=false
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socket_id=0
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switched_out=false
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system=system
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tracer=system.cpu2.tracer
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width=1
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workload=system.cpu0.workload
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dcache_port=system.cpu2.dcache.cpu_side
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icache_port=system.cpu2.icache.cpu_side
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[system.cpu2.dcache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=false
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu2.dcache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=false
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cpu_side=system.cpu2.dcache_port
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mem_side=system.toL2Bus.slave[5]
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[system.cpu2.dcache.tags]
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type=LRU
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assoc=4
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu2.dtb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu2.icache]
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type=Cache
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children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=true
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max_miss_count=0
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mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=32768
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system=system
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tags=system.cpu2.icache.tags
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tgts_per_mshr=20
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write_buffers=8
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writeback_clean=true
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cpu_side=system.cpu2.icache_port
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mem_side=system.toL2Bus.slave[4]
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[system.cpu2.icache.tags]
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type=LRU
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assoc=1
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=32768
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[system.cpu2.interrupts]
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type=SparcInterrupts
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eventq_index=0
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[system.cpu2.isa]
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type=SparcISA
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eventq_index=0
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[system.cpu2.itb]
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type=SparcTLB
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eventq_index=0
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size=64
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[system.cpu2.tracer]
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type=ExeTracer
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eventq_index=0
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[system.cpu3]
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type=AtomicSimpleCPU
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children=dcache dtb icache interrupts isa itb tracer
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branchPred=Null
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checker=Null
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clk_domain=system.cpu_clk_domain
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cpu_id=3
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do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu3.dtb
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|
eventq_index=0
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fastmem=false
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|
function_trace=false
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function_trace_start=0
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interrupts=system.cpu3.interrupts
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isa=system.cpu3.isa
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itb=system.cpu3.itb
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max_insts_all_threads=0
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|
max_insts_any_thread=0
|
|
max_loads_all_threads=0
|
|
max_loads_any_thread=0
|
|
numThreads=1
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|
profile=0
|
|
progress_interval=0
|
|
simpoint_start_insts=
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simulate_data_stalls=false
|
|
simulate_inst_stalls=false
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|
socket_id=0
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switched_out=false
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system=system
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tracer=system.cpu3.tracer
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width=1
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workload=system.cpu0.workload
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dcache_port=system.cpu3.dcache.cpu_side
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icache_port=system.cpu3.icache.cpu_side
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|
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[system.cpu3.dcache]
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type=Cache
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|
children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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|
clk_domain=system.cpu_clk_domain
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|
clusivity=mostly_incl
|
|
demand_mshr_reserve=1
|
|
eventq_index=0
|
|
forward_snoops=true
|
|
hit_latency=2
|
|
is_read_only=false
|
|
max_miss_count=0
|
|
mshrs=4
|
|
prefetch_on_access=false
|
|
prefetcher=Null
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|
response_latency=2
|
|
sequential_access=false
|
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size=32768
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system=system
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tags=system.cpu3.dcache.tags
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tgts_per_mshr=20
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write_buffers=8
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|
writeback_clean=false
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cpu_side=system.cpu3.dcache_port
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mem_side=system.toL2Bus.slave[7]
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|
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[system.cpu3.dcache.tags]
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type=LRU
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|
assoc=4
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|
block_size=64
|
|
clk_domain=system.cpu_clk_domain
|
|
eventq_index=0
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|
hit_latency=2
|
|
sequential_access=false
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|
size=32768
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|
|
[system.cpu3.dtb]
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type=SparcTLB
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|
eventq_index=0
|
|
size=64
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|
|
[system.cpu3.icache]
|
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type=Cache
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|
children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
|
|
demand_mshr_reserve=1
|
|
eventq_index=0
|
|
forward_snoops=true
|
|
hit_latency=2
|
|
is_read_only=true
|
|
max_miss_count=0
|
|
mshrs=4
|
|
prefetch_on_access=false
|
|
prefetcher=Null
|
|
response_latency=2
|
|
sequential_access=false
|
|
size=32768
|
|
system=system
|
|
tags=system.cpu3.icache.tags
|
|
tgts_per_mshr=20
|
|
write_buffers=8
|
|
writeback_clean=true
|
|
cpu_side=system.cpu3.icache_port
|
|
mem_side=system.toL2Bus.slave[6]
|
|
|
|
[system.cpu3.icache.tags]
|
|
type=LRU
|
|
assoc=1
|
|
block_size=64
|
|
clk_domain=system.cpu_clk_domain
|
|
eventq_index=0
|
|
hit_latency=2
|
|
sequential_access=false
|
|
size=32768
|
|
|
|
[system.cpu3.interrupts]
|
|
type=SparcInterrupts
|
|
eventq_index=0
|
|
|
|
[system.cpu3.isa]
|
|
type=SparcISA
|
|
eventq_index=0
|
|
|
|
[system.cpu3.itb]
|
|
type=SparcTLB
|
|
eventq_index=0
|
|
size=64
|
|
|
|
[system.cpu3.tracer]
|
|
type=ExeTracer
|
|
eventq_index=0
|
|
|
|
[system.cpu_clk_domain]
|
|
type=SrcClockDomain
|
|
clock=500
|
|
domain_id=-1
|
|
eventq_index=0
|
|
init_perf_level=0
|
|
voltage_domain=system.voltage_domain
|
|
|
|
[system.dvfs_handler]
|
|
type=DVFSHandler
|
|
domains=
|
|
enable=false
|
|
eventq_index=0
|
|
sys_clk_domain=system.clk_domain
|
|
transition_latency=100000000
|
|
|
|
[system.l2c]
|
|
type=Cache
|
|
children=tags
|
|
addr_ranges=0:18446744073709551615
|
|
assoc=8
|
|
clk_domain=system.cpu_clk_domain
|
|
clusivity=mostly_incl
|
|
demand_mshr_reserve=1
|
|
eventq_index=0
|
|
forward_snoops=true
|
|
hit_latency=20
|
|
is_read_only=false
|
|
max_miss_count=0
|
|
mshrs=20
|
|
prefetch_on_access=false
|
|
prefetcher=Null
|
|
response_latency=20
|
|
sequential_access=false
|
|
size=4194304
|
|
system=system
|
|
tags=system.l2c.tags
|
|
tgts_per_mshr=12
|
|
write_buffers=8
|
|
writeback_clean=false
|
|
cpu_side=system.toL2Bus.master[0]
|
|
mem_side=system.membus.slave[1]
|
|
|
|
[system.l2c.tags]
|
|
type=LRU
|
|
assoc=8
|
|
block_size=64
|
|
clk_domain=system.cpu_clk_domain
|
|
eventq_index=0
|
|
hit_latency=20
|
|
sequential_access=false
|
|
size=4194304
|
|
|
|
[system.membus]
|
|
type=CoherentXBar
|
|
clk_domain=system.clk_domain
|
|
eventq_index=0
|
|
forward_latency=4
|
|
frontend_latency=3
|
|
response_latency=2
|
|
snoop_filter=Null
|
|
snoop_response_latency=4
|
|
system=system
|
|
use_default_range=false
|
|
width=16
|
|
master=system.physmem.port
|
|
slave=system.system_port system.l2c.mem_side
|
|
|
|
[system.physmem]
|
|
type=SimpleMemory
|
|
bandwidth=73.000000
|
|
clk_domain=system.clk_domain
|
|
conf_table_reported=true
|
|
eventq_index=0
|
|
in_addr_map=true
|
|
latency=30000
|
|
latency_var=0
|
|
null=false
|
|
range=0:134217727
|
|
port=system.membus.master[0]
|
|
|
|
[system.toL2Bus]
|
|
type=CoherentXBar
|
|
children=snoop_filter
|
|
clk_domain=system.cpu_clk_domain
|
|
eventq_index=0
|
|
forward_latency=0
|
|
frontend_latency=1
|
|
response_latency=1
|
|
snoop_filter=system.toL2Bus.snoop_filter
|
|
snoop_response_latency=1
|
|
system=system
|
|
use_default_range=false
|
|
width=32
|
|
master=system.l2c.cpu_side
|
|
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
|
|
|
|
[system.toL2Bus.snoop_filter]
|
|
type=SnoopFilter
|
|
eventq_index=0
|
|
lookup_latency=0
|
|
max_capacity=8388608
|
|
system=system
|
|
|
|
[system.voltage_domain]
|
|
type=VoltageDomain
|
|
eventq_index=0
|
|
voltage=1.000000
|
|
|