82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
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#ifndef __TSUNAMIREG_H__
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#define __TSUNAMIREG_H__
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// CChip Registers
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#define TSDEV_CC_CSR 0x00
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#define TSDEV_CC_MTR 0x01
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#define TSDEV_CC_MISC 0x02
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#define TSDEV_CC_AAR0 0x04
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#define TSDEV_CC_AAR1 0x05
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#define TSDEV_CC_AAR2 0x06
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#define TSDEV_CC_AAR3 0x07
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#define TSDEV_CC_DIM0 0x08
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#define TSDEV_CC_DIM1 0x09
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#define TSDEV_CC_DIR0 0x0A
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#define TSDEV_CC_DIR1 0x0B
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#define TSDEV_CC_DRIR 0x0C
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#define TSDEV_CC_PRBEN 0x0D
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#define TSDEV_CC_IIC0 0x0E
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#define TSDEV_CC_IIC1 0x0F
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#define TSDEV_CC_MPR0 0x10
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#define TSDEV_CC_MPR1 0x11
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#define TSDEV_CC_MPR2 0x12
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#define TSDEV_CC_MPR3 0x13
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#define TSDEV_CC_DIM2 0x18
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#define TSDEV_CC_DIM3 0x19
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#define TSDEV_CC_DIR2 0x1A
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#define TSDEV_CC_DIR3 0x1B
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#define TSDEV_CC_IIC2 0x1C
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#define TSDEV_CC_IIC3 0x1D
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// PChip Registers
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#define TSDEV_PC_WSBA0 0x00
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#define TSDEV_PC_WSBA1 0x01
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#define TSDEV_PC_WSBA2 0x02
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#define TSDEV_PC_WSBA3 0x03
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#define TSDEV_PC_WSM0 0x04
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#define TSDEV_PC_WSM1 0x05
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#define TSDEV_PC_WSM2 0x06
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#define TSDEV_PC_WSM3 0x07
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#define TSDEV_PC_TBA0 0x08
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#define TSDEV_PC_TBA1 0x09
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#define TSDEV_PC_TBA2 0x0A
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#define TSDEV_PC_TBA3 0x0B
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#define TSDEV_PC_PCTL 0x0C
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#define TSDEV_PC_PLAT 0x0D
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#define TSDEV_PC_RES 0x0E
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#define TSDEV_PC_PERROR 0x0F
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#define TSDEV_PC_PERRMASK 0x10
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#define TSDEV_PC_PERRSET 0x11
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#define TSDEV_PC_TLBIV 0x12
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#define TSDEV_PC_TLBIA 0x13
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#define TSDEV_PC_PMONCTL 0x14
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#define TSDEV_PC_PMONCNT 0x15
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#define TSDEV_PC_SPST 0x20
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// DChip Registers
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#define TSDEV_DC_DSC 0x20
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#define TSDEV_DC_STR 0x21
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#define TSDEV_DC_DREV 0x22
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#define TSDEV_DC_DSC2 0x23
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// I/O Ports
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#define TSDEV_PIC1_MASK 0x21
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#define TSDEV_PIC2_MASK 0xA1
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#define TSDEV_DMA1_RESET 0x0D
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#define TSDEV_DMA2_RESET 0xDA
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#define TSDEV_DMA1_MODE 0x0B
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#define TSDEV_DMA2_MODE 0xD6
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#define TSDEV_DMA1_MASK 0x0A
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#define TSDEV_DMA2_MASK 0xD4
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#define TSDEV_TMR_CTL 0x61
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#define TSDEV_TMR2_CTL 0x43
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#define TSDEV_TMR2_DATA 0x42
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#define TSDEV_TMR0_DATA 0x40
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#endif // __TSUNAMIREG_H__
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