a309c2f343
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Add callbacks for the Gem5SimControl that are called at before and * after simulate() Reviewed at http://reviews.gem5.org/r/3799/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
223 lines
6.3 KiB
C++
223 lines
6.3 KiB
C++
/*
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* Copyright (c) 2015, University of Kaiserslautern
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* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Matthias Jung
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* Abdul Mutaal Ahmad
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* Christian Menard
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*/
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/**
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* @file
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*
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* Example top level file for SystemC-TLM integration with C++-only
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* instantiation.
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*
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*/
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#include <systemc>
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#include <tlm>
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#include "sc_master_port.hh"
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#include "sc_slave_port.hh"
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#include "sim/cxx_config_ini.hh"
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#include "sim/init_signals.hh"
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#include "sim/stat_control.hh"
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#include "sim_control.hh"
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#include "stats.hh"
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// Define global string variable decalred in stats.hh
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std::string filename = "m5out/stats-systemc.txt";
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namespace Gem5SystemC
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{
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Gem5SimControl* Gem5SimControl::instance = nullptr;
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Gem5SimControl::Gem5SimControl(sc_core::sc_module_name name,
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const std::string& configFile,
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uint64_t simulationEnd,
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const std::string& gem5DebugFlags)
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: Gem5SystemC::Module(name),
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simulationEnd(simulationEnd)
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{
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SC_THREAD(run);
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if (instance != nullptr) {
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panic("Tried to instantiate Gem5SimControl more than once!\n");
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}
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instance = this;
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cxxConfigInit();
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// register the systemc slave and master port handler
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ExternalSlave::registerHandler("tlm_slave", new SCSlavePortHandler(*this));
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ExternalMaster::registerHandler("tlm_master",
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new SCMasterPortHandler(*this));
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Trace::setDebugLogger(&logger);
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Gem5SystemC::setTickFrequency();
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sc_core::sc_set_time_resolution(1, sc_core::SC_PS);
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Gem5SystemC::Module::setupEventQueues(*this);
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initSignals();
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Stats::initSimStats();
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Stats::registerHandlers(CxxConfig::statsReset, CxxConfig::statsDump);
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Trace::enable();
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CxxConfigFileBase* conf = new CxxIniFile();
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if (configFile.empty()) {
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std::cerr << "No gem5 config file specified!\n";
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std::exit(EXIT_FAILURE);
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}
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if (!conf->load(configFile.c_str())) {
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std::cerr << "Can't open config file: " << configFile << '\n';
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std::exit(EXIT_FAILURE);
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}
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config_manager = new CxxConfigManager(*conf);
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// parse debug flags string and clear/set flags accordingly
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std::stringstream ss;
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ss.str(gem5DebugFlags);
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std::string flag;
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while (std::getline(ss, flag, ' ')) {
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if (flag.at(0) == '-') {
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flag.erase(0, 1); // remove the '-'
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clearDebugFlag(flag.c_str());
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}
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else {
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setDebugFlag(flag.c_str());
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}
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}
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CxxConfig::statsEnable();
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getEventQueue(0)->dump();
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try {
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config_manager->instantiate();
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} catch (CxxConfigManager::Exception &e) {
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std::cerr << "Config problem in sim object "
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<< e.name << ": " << e.message << "\n";
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std::exit(EXIT_FAILURE);
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}
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}
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void
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Gem5SimControl::end_of_elaboration()
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{
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try {
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config_manager->initState();
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config_manager->startup();
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} catch (CxxConfigManager::Exception &e) {
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std::cerr << "Config problem in sim object "
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<< e.name << ": " << e.message << "\n";
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std::exit(EXIT_FAILURE);
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}
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}
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void
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Gem5SimControl::run()
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{
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// notify callback
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beforeSimulate();
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GlobalSimLoopExitEvent *exit_event = NULL;
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if (simulationEnd == 0) {
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exit_event = simulate();
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} else {
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exit_event = simulate(simulationEnd);
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}
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std::cerr << "Exit at tick " << curTick()
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<< ", cause: " << exit_event->getCause() << '\n';
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getEventQueue(0)->dump();
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// notify callback
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afterSimulate();
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#if TRY_CLEAN_DELETE
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config_manager->deleteObjects();
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#endif
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}
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void
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Gem5SimControl::registerSlavePort(const std::string& name, SCSlavePort* port)
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{
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if (slavePorts.find(name) == slavePorts.end()) {
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slavePorts[name] = port;
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} else {
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std::cerr << "Slave Port " << name << " is already registered!\n";
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std::exit(EXIT_FAILURE);
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}
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}
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void
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Gem5SimControl::registerMasterPort(const std::string& name, SCMasterPort* port)
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{
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if (masterPorts.find(name) == masterPorts.end()) {
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masterPorts[name] = port;
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} else {
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std::cerr << "Master Port " << name << " is already registered!\n";
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std::exit(EXIT_FAILURE);
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}
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}
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SCSlavePort*
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Gem5SimControl::getSlavePort(const std::string& name)
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{
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if (slavePorts.find(name) == slavePorts.end()) {
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std::cerr << "Slave Port " << name << " was not found!\n";
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std::exit(EXIT_FAILURE);
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}
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return slavePorts.at(name);
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}
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SCMasterPort*
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Gem5SimControl::getMasterPort(const std::string& name)
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{
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if (masterPorts.find(name) == masterPorts.end()) {
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std::cerr << "Master Port " << name << " was not found!\n";
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std::exit(EXIT_FAILURE);
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}
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return masterPorts.at(name);
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}
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}
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