gem5/src
Andreas Hansson 986214f181 mem: Align how snoops are handled when hitting writebacks
This patch unifies the snoop handling in case of hitting writebacks
with how we handle snoops hitting in the tags. As a result, we end up
using the same optimisation as the normal snoops, where we inform the
downstream cache if we encounter a line in Modified (writable and
dirty) state, which enables us to avoid sending out express snoops to
invalidate any Shared copies of the line. A few regressions
consequently change, as some transactions are sunk higher up in the
cache hierarchy.
2016-02-10 04:08:24 -05:00
..
arch x86: revamp cmpxchg8b/cmpxchg16b implementation 2016-02-06 17:21:20 -08:00
base style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
cpu mem: Deduce if cache should forward snoops 2016-02-10 04:08:24 -05:00
dev style: eliminate explicit boolean comparisons 2016-02-06 17:21:20 -08:00
doc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
gpu-compute gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
kern misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
mem mem: Align how snoops are handled when hitting writebacks 2016-02-10 04:08:24 -05:00
proto cpu: Support virtual addr in elastic traces 2015-12-07 16:42:16 -06:00
python style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
sim style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
unittest style: remove trailing whitespace 2016-02-06 17:21:18 -08:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript scons: always generate sim/tags.cc 2016-02-08 13:39:45 -06:00