Steve Reinhardt 97b6947eb7 Minor tweaks for future Ruby compatibility.		2009-04-21 08:17:36 -07:00
..
Benchmarks.py	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
Caches.py	DMA: Add IOCache and fix bus bridge to optionally only send requests one	2007-08-10 16:14:01 -04:00
cpu2000.py	configs: Allow M5_CPU2000 env var to set CPU2K binary path.	2009-04-15 12:52:31 -07:00
FSConfig.py	X86: Actually put the PCI INTA entry into the MP tables.	2009-04-19 04:15:18 -07:00
Options.py	Configs: Add support for the InOrder CPU model	2009-02-10 15:49:29 -08:00
Simulation.py	Minor tweaks for future Ruby compatibility.	2009-04-21 08:17:36 -07:00
SysPaths.py	make rcS files read from the m5 source directory, not /dist.	2006-11-08 14:10:25 -05:00