arch/isa_parser.py: Expanded the capability of the InstObjParams constructor to allow adding in extra keys for use in templates. These are added as key, value tuples as optional arguements. arch/sparc/isa/base.isa: arch/sparc/isa/formats/mem.isa: arch/sparc/isa/formats/priv.isa: The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. arch/sparc/isa/decoder.isa: Fixed up alot of instructions, and fixed indentation. arch/sparc/isa/formats/integerop.isa: The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. Also changed the immediate values to be signed. base/traceflags.py: Added SPARC traceflag configs/test/hello_sparc: Recompiled without -mflat cpu/cpu_exec_context.cc: Used the regfile clear function rather than memsetting to 0. --HG-- extra : convert_revision : b9da6f264f3ebc4ce1815008dfff7f476b247ee9
139 lines
4.1 KiB
Text
139 lines
4.1 KiB
Text
////////////////////////////////////////////////////////////////////
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//
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// Privilege mode instructions
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//
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output header {{
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/**
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* Base class for privelege mode operations.
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*/
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class Priv : public SparcStaticInst
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{
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protected:
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// Constructor
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Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
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SparcStaticInst(mnem, _machInst, __opClass)
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{
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}
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std::string generateDisassembly(Addr pc,
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const SymbolTable *symtab) const;
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};
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/**
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* Base class for user mode "tick" access.
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*/
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class PrivTick : public SparcStaticInst
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{
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protected:
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// Constructor
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PrivTick(const char *mnem, ExtMachInst _machInst,
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OpClass __opClass) :
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SparcStaticInst(mnem, _machInst, __opClass)
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{
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}
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std::string generateDisassembly(Addr pc,
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const SymbolTable *symtab) const;
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};
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/**
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* Base class for privelege mode operations with immediates.
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*/
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class PrivImm : public Priv
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{
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protected:
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// Constructor
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PrivImm(const char *mnem, ExtMachInst _machInst,
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OpClass __opClass) :
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Priv(mnem, _machInst, __opClass), imm(SIMM13)
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{
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}
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int32_t imm;
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};
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/**
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* Base class for user mode "tick" access with immediates.
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*/
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class PrivTickImm : public PrivTick
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{
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protected:
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// Constructor
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PrivTickImm(const char *mnem, ExtMachInst _machInst,
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OpClass __opClass) :
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PrivTick(mnem, _machInst, __opClass), imm(SIMM13)
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{
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}
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int32_t imm;
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};
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}};
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output decoder {{
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std::string Priv::generateDisassembly(Addr pc,
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const SymbolTable *symtab) const
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{
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return "Privileged Instruction";
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}
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std::string PrivTick::generateDisassembly(Addr pc,
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const SymbolTable *symtab) const
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{
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return "Regular access to Tick";
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}
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}};
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def template PrivExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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%(op_decl)s;
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%(op_rd)s;
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//If the processor isn't in privileged mode, fault out right away
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if(%(check)s)
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return new PrivilegedAction;
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%(code)s;
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%(op_wb)s;
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return NoFault;
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}
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}};
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let {{
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def doPrivFormat(code, checkCode, name, Name, opt_flags):
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(usesImm, code, immCode,
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rString, iString) = splitOutImm(code)
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iop = InstObjParams(name, Name, 'Priv', code,
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opt_flags, ("check", checkCode))
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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exec_output = PrivExecute.subst(iop)
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if usesImm:
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imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
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immCode, opt_flags, ("check", checkCode))
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header_output += BasicDeclare.subst(imm_iop)
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decoder_output += BasicConstructor.subst(imm_iop)
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exec_output += PrivExecute.subst(imm_iop)
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decode_block = ROrImmDecode.subst(iop)
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else:
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decode_block = BasicDecode.subst(iop)
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return (header_output, decoder_output, exec_output, decode_block)
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}};
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// Primary format for integer operate instructions:
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def format Priv(code, *opt_flags) {{
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checkCode = "(!PstatePriv)"
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(header_output, decoder_output,
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exec_output, decode_block) = doPrivFormat(code,
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checkCode, name, Name, opt_flags)
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}};
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// Primary format for integer operate instructions:
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def format PrivTick(code, *opt_flags) {{
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checkCode = "(!PstatePriv && TickNpt)"
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(header_output, decoder_output,
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exec_output, decode_block) = doPrivFormat(code,
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checkCode, name, Name, opt_flags)
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}};
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