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Andreas Hansson 9727b1be18 MEM: Unify bus access methods and prepare for master/slave split This patch unifies the recvFunctional, recvAtomic and recvTiming to all be based on a similar structure: 1) extract information about the incoming packet, 2) send it out to the appropriate snoopers, 3) determine where it is going, and 4) forward it to the right destination. The naming of variables across the different access functions is now consistent as well. Additionally, the patch introduces the member functions releaseBus and retryWaiting to better distinguish between the two cases when we should tell a sender to retry. The first case is when the bus goes from busy to idle, and the second case is when it receives a retry from a destination that did not immediatelly accept a packet. As a very minor change, the MMU debug flag is no longer used in the bus.		2012-03-22 06:37:21 -04:00
build_opts	SE/FS: Pull FULL_SYSTEM out of the build_opts files	2012-01-28 07:24:53 -08:00
configs	ruby_fs.py: Add call to createInterruptController()	2012-03-16 07:47:03 -05:00
ext	clang: Enable compiling gem5 using clang 2.9 and 3.0	2012-01-31 12:05:52 -05:00
src	MEM: Unify bus access methods and prepare for master/slave split	2012-03-22 06:37:21 -04:00
system	ARM: Add support for Versatile Express extended memory map	2012-03-01 17:26:31 -06:00
tests	ARM: Update stats for IT and conditional branch changes	2012-03-21 10:36:45 -05:00
util	m5=>gem5: Make the regression script build gem5.* instead of m5.*	2012-02-07 04:43:05 -08:00
.hgignore	.hgignore: added src/doxygen	2010-07-27 20:00:38 -07:00
.hgtags	Added tag Calvin_Submission for changeset 5de565c4b7bd	2009-11-18 11:55:42 -06:00
COPYING	copyright: Add code for finding all copyright blocks and create a COPYING file	2011-06-02 17:36:07 -07:00
LICENSE	copyright: Add code for finding all copyright blocks and create a COPYING file	2011-06-02 17:36:07 -07:00
README	Info: Clean up some info files.	2011-02-14 21:36:37 -08:00
SConstruct	build: remove implicit-cache setting of scons from recent build faster patch	2012-03-16 03:29:07 -07:00

README

This is the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.98.1 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.31 or newer, get it from
http://wwww.swig.org.

3. Make sure you also have gcc version 3.4.6 or newer, Python 2.4 or newer
(the dev version with header files), zlib, and the m4 preprocessor.

4. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5:
   - configs: simulation configuration scripts
   - ext: less-common external packages needed to build m5
   - src: source code of the m5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk images. 
These files for Alpha are collected in a separate archive, m5_system.tar.bz2.
This file can he downloaded separately.

Depending on the ISA used, M5 may support Linux 2.4/2.6, FreeBSD, and the
proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux
and FreeBSD bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-users@m5sim.org