11aead894d
Also several files need to include system.hh or symtab.hh. This is because exec_context.hh has less #includes than before, requiring some of the files that include it to include some other files as well.
arch/alpha/faults.cc:
Avoid accessing XC directly.
arch/alpha/stacktrace.cc:
StackTrace needs to include system.hh.
cpu/cpu_exec_context.cc:
Update for change to CPUExecContext.
cpu/cpu_exec_context.hh:
Make quiesce events use CPUExecContext instead of ExecContext. Include functions to allow the quiesce event and last activate/suspend be accessed.
cpu/exec_context.hh:
Include functions for quiesceEvent.
cpu/intr_control.cc:
Needs to include cpu/exec_context.hh.
cpu/profile.cc:
Needs to include symtab.hh for the symbol table.
cpu/profile.hh:
Needs forward declare of ExecContext.
cpu/simple/cpu.cc:
Rename xc to cpuXC.
dev/tsunami_cchip.cc:
Needs to include exec_context.hh.
kern/kernel_stats.cc:
Needs to include system.hh.
kern/linux/events.cc:
Needs to include system.hh.
Also avoid accessing objects directly from the XC.
kern/tru64/dump_mbuf.cc:
Include symtab.hh for the SymbolTable and system.hh.
kern/tru64/tru64_events.cc:
Include system.hh
sim/pseudo_inst.cc:
Avoid accessing objects directly within the XC.
--HG--
extra : convert_revision : 78fe30d98cd20f7403fa216f772071458b675c84
97 lines
3.1 KiB
C++
97 lines
3.1 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <string>
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#include <vector>
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#include "cpu/base.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/intr_control.hh"
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#include "sim/builder.hh"
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#include "sim/sim_object.hh"
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using namespace std;
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IntrControl::IntrControl(const string &name, BaseCPU *c)
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: SimObject(name), cpu(c)
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{}
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/* @todo
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*Fix the cpu sim object parameter to be a system pointer
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*instead, to avoid some extra dereferencing
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*/
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void
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IntrControl::post(int int_num, int index)
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{
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std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
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BaseCPU *temp = xcvec[0]->getCpuPtr();
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temp->post_interrupt(int_num, index);
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}
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void
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IntrControl::post(int cpu_id, int int_num, int index)
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{
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std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
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BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
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temp->post_interrupt(int_num, index);
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}
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void
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IntrControl::clear(int int_num, int index)
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{
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std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
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BaseCPU *temp = xcvec[0]->getCpuPtr();
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temp->clear_interrupt(int_num, index);
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}
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void
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IntrControl::clear(int cpu_id, int int_num, int index)
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{
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std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
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BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
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temp->clear_interrupt(int_num, index);
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
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SimObjectParam<BaseCPU *> cpu;
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END_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
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BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl)
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INIT_PARAM(cpu, "the cpu")
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END_INIT_SIM_OBJECT_PARAMS(IntrControl)
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CREATE_SIM_OBJECT(IntrControl)
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{
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return new IntrControl(getInstanceName(), cpu);
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}
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REGISTER_SIM_OBJECT("IntrControl", IntrControl)
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