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gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini
Steve Reinhardt 1483496803 stats: update Minor stats due to PF bug fix 
A recent changeset of mine (http://repo.gem5.org/gem5/rev/4cfe55719da5)
inadvertently fixed a bug in the Minor CPU model which caused it to treat
software prefetches as regular loads.  Prior to this changeset, Minor
did an ad-hoc generation of memory commands that left out the PF check;
because it now uses the common code that the other CPU models use,
it generates prefetches properly.  These stat changes reflect the fact
that the Minor model now issues SoftPFReqs.
2015-03-19 08:41:32 -04:00

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[root]
type=Root
children=system
eventq_index=0
full_system=true
sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
[system]
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/dist/m5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
boot_release_addr=65528
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
flags_addr=469827632
gic_cpu_addr=738205696
have_generic_timer=false
have_large_asid_64=false
have_lpae=false
have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
machine_type=VExpress_EMM
mem_mode=timing
mem_ranges=2147483648:2415919103
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/z/stever/hg/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.slave[1]
[system.bridge]
type=Bridge
clk_domain=system.clk_domain
delay=50000
eventq_index=0
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
req_size=16
resp_size=16
master=system.iobus.slave[0]
slave=system.membus.master[0]
[system.cf0]
type=IdeDisk
children=image
delay=1000000
driveID=master
eventq_index=0
image=system.cf0.image
[system.cf0.image]
type=CowDiskImage
children=child
child=system.cf0.image.child
eventq_index=0
image_file=
read_only=false
table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/dist/m5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
type=SrcClockDomain
clock=1000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
type=MinorCPU
children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
branchPred=system.cpu.branchPred
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
decodeCycleInput=true
decodeInputBufferSize=3
decodeInputWidth=2
decodeToExecuteForwardDelay=1
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dstage2_mmu=system.cpu.dstage2_mmu
dtb=system.cpu.dtb
enableIdling=true
eventq_index=0
executeAllowEarlyMemoryIssue=true
executeBranchDelay=1
executeCommitLimit=2
executeCycleInput=true
executeFuncUnits=system.cpu.executeFuncUnits
executeInputBufferSize=7
executeInputWidth=2
executeIssueLimit=2
executeLSQMaxStoreBufferStoresPerCycle=2
executeLSQRequestsQueueSize=1
executeLSQStoreBufferSize=5
executeLSQTransfersQueueSize=2
executeMaxAccessesInMemory=2
executeMemoryCommitLimit=1
executeMemoryIssueLimit=1
executeMemoryWidth=0
executeSetTraceTimeOnCommit=true
executeSetTraceTimeOnIssue=false
fetch1FetchLimit=1
fetch1LineSnapWidth=0
fetch1LineWidth=0
fetch1ToFetch2BackwardDelay=1
fetch1ToFetch2ForwardDelay=1
fetch2CycleInput=true
fetch2InputBufferSize=2
fetch2ToDecodeForwardDelay=1
function_trace=false
function_trace_start=0
interrupts=system.cpu.interrupts
isa=system.cpu.isa
istage2_mmu=system.cpu.istage2_mmu
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
profile=0
progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
system=system
tracer=system.cpu.tracer
workload=
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.branchPred]
type=BranchPredictor
BTBEntries=4096
BTBTagSize=16
RASSize=16
choiceCtrBits=2
choicePredictorSize=8192
eventq_index=0
globalCtrBits=2
globalPredictorSize=8192
instShiftAmt=2
localCtrBits=2
localHistoryTableSize=2048
localPredictorSize=2048
numThreads=1
predType=tournament
[system.cpu.dcache]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768
[system.cpu.dstage2_mmu]
type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
sys=system
tlb=system.cpu.dtb
[system.cpu.dstage2_mmu.stage2_tlb]
type=ArmTLB
children=walker
eventq_index=0
is_stage2=true
size=32
walker=system.cpu.dstage2_mmu.stage2_tlb.walker
[system.cpu.dstage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
[system.cpu.dtb]
type=ArmTLB
children=walker
eventq_index=0
is_stage2=false
size=64
walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.executeFuncUnits]
type=MinorFUPool
children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
eventq_index=0
funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
[system.cpu.executeFuncUnits.funcUnits0]
type=MinorFU
children=opClasses timings
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
opLat=3
timings=system.cpu.executeFuncUnits.funcUnits0.timings
[system.cpu.executeFuncUnits.funcUnits0.opClasses]
type=MinorOpClassSet
children=opClasses
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
type=MinorOpClass
eventq_index=0
opClass=IntAlu
[system.cpu.executeFuncUnits.funcUnits0.timings]
type=MinorFUTiming
children=opClasses
description=Int
eventq_index=0
extraAssumedLat=0
extraCommitLat=0
extraCommitLatExpr=Null
mask=0
match=0
opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
srcRegsRelativeLats=2
suppress=false
[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
type=MinorOpClassSet
eventq_index=0
opClasses=
[system.cpu.executeFuncUnits.funcUnits1]
type=MinorFU
children=opClasses timings
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
opLat=3
timings=system.cpu.executeFuncUnits.funcUnits1.timings
[system.cpu.executeFuncUnits.funcUnits1.opClasses]
type=MinorOpClassSet
children=opClasses
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
type=MinorOpClass
eventq_index=0
opClass=IntAlu
[system.cpu.executeFuncUnits.funcUnits1.timings]
type=MinorFUTiming
children=opClasses
description=Int
eventq_index=0
extraAssumedLat=0
extraCommitLat=0
extraCommitLatExpr=Null
mask=0
match=0
opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
srcRegsRelativeLats=2
suppress=false
[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
type=MinorOpClassSet
eventq_index=0
opClasses=
[system.cpu.executeFuncUnits.funcUnits2]
type=MinorFU
children=opClasses timings
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
opLat=3
timings=system.cpu.executeFuncUnits.funcUnits2.timings
[system.cpu.executeFuncUnits.funcUnits2.opClasses]
type=MinorOpClassSet
children=opClasses
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
type=MinorOpClass
eventq_index=0
opClass=IntMult
[system.cpu.executeFuncUnits.funcUnits2.timings]
type=MinorFUTiming
children=opClasses
description=Mul
eventq_index=0
extraAssumedLat=0
extraCommitLat=0
extraCommitLatExpr=Null
mask=0
match=0
opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
srcRegsRelativeLats=0
suppress=false
[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
type=MinorOpClassSet
eventq_index=0
opClasses=
[system.cpu.executeFuncUnits.funcUnits3]
type=MinorFU
children=opClasses
cantForwardFromFUIndices=
eventq_index=0
issueLat=9
opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
opLat=9
timings=
[system.cpu.executeFuncUnits.funcUnits3.opClasses]
type=MinorOpClassSet
children=opClasses
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
type=MinorOpClass
eventq_index=0
opClass=IntDiv
[system.cpu.executeFuncUnits.funcUnits4]
type=MinorFU
children=opClasses timings
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
opLat=6
timings=system.cpu.executeFuncUnits.funcUnits4.timings
[system.cpu.executeFuncUnits.funcUnits4.opClasses]
type=MinorOpClassSet
children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
type=MinorOpClass
eventq_index=0
opClass=FloatAdd
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
type=MinorOpClass
eventq_index=0
opClass=FloatCmp
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
type=MinorOpClass
eventq_index=0
opClass=FloatCvt
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
type=MinorOpClass
eventq_index=0
opClass=FloatMult
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
type=MinorOpClass
eventq_index=0
opClass=FloatDiv
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
type=MinorOpClass
eventq_index=0
opClass=FloatSqrt
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
type=MinorOpClass
eventq_index=0
opClass=SimdAdd
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
type=MinorOpClass
eventq_index=0
opClass=SimdAddAcc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
type=MinorOpClass
eventq_index=0
opClass=SimdAlu
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
type=MinorOpClass
eventq_index=0
opClass=SimdCmp
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
type=MinorOpClass
eventq_index=0
opClass=SimdCvt
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
type=MinorOpClass
eventq_index=0
opClass=SimdMisc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
type=MinorOpClass
eventq_index=0
opClass=SimdMult
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
type=MinorOpClass
eventq_index=0
opClass=SimdMultAcc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
type=MinorOpClass
eventq_index=0
opClass=SimdShift
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
type=MinorOpClass
eventq_index=0
opClass=SimdShiftAcc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
type=MinorOpClass
eventq_index=0
opClass=SimdSqrt
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatAdd
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatAlu
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatCmp
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatCvt
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatDiv
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatMisc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatMult
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatMultAcc
[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
type=MinorOpClass
eventq_index=0
opClass=SimdFloatSqrt
[system.cpu.executeFuncUnits.funcUnits4.timings]
type=MinorFUTiming
children=opClasses
description=FloatSimd
eventq_index=0
extraAssumedLat=0
extraCommitLat=0
extraCommitLatExpr=Null
mask=0
match=0
opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
srcRegsRelativeLats=2
suppress=false
[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
type=MinorOpClassSet
eventq_index=0
opClasses=
[system.cpu.executeFuncUnits.funcUnits5]
type=MinorFU
children=opClasses timings
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
opLat=1
timings=system.cpu.executeFuncUnits.funcUnits5.timings
[system.cpu.executeFuncUnits.funcUnits5.opClasses]
type=MinorOpClassSet
children=opClasses0 opClasses1
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
type=MinorOpClass
eventq_index=0
opClass=MemRead
[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
type=MinorOpClass
eventq_index=0
opClass=MemWrite
[system.cpu.executeFuncUnits.funcUnits5.timings]
type=MinorFUTiming
children=opClasses
description=Mem
eventq_index=0
extraAssumedLat=2
extraCommitLat=0
extraCommitLatExpr=Null
mask=0
match=0
opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
srcRegsRelativeLats=1
suppress=false
[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
type=MinorOpClassSet
eventq_index=0
opClasses=
[system.cpu.executeFuncUnits.funcUnits6]
type=MinorFU
children=opClasses
cantForwardFromFUIndices=
eventq_index=0
issueLat=1
opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
opLat=1
timings=
[system.cpu.executeFuncUnits.funcUnits6.opClasses]
type=MinorOpClassSet
children=opClasses0 opClasses1
eventq_index=0
opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
type=MinorOpClass
eventq_index=0
opClass=IprAccess
[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
type=MinorOpClass
eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu.icache.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768
[system.cpu.interrupts]
type=ArmInterrupts
eventq_index=0
[system.cpu.isa]
type=ArmISA
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
id_aa64afr1_el1=0
id_aa64dfr0_el1=1052678
id_aa64dfr1_el1=0
id_aa64isar0_el1=0
id_aa64isar1_el1=0
id_aa64mmfr0_el1=15728642
id_aa64mmfr1_el1=0
id_aa64pfr0_el1=17
id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
id_isar2=555950401
id_isar3=17899825
id_isar4=268501314
id_isar5=0
id_mmfr0=270536963
id_mmfr1=0
id_mmfr2=19070976
id_mmfr3=34611729
id_pfr0=49
id_pfr1=4113
midr=1091551472
pmu=Null
system=system
[system.cpu.istage2_mmu]
type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
sys=system
tlb=system.cpu.itb
[system.cpu.istage2_mmu.stage2_tlb]
type=ArmTLB
children=walker
eventq_index=0
is_stage2=true
size=32
walker=system.cpu.istage2_mmu.stage2_tlb.walker
[system.cpu.istage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
[system.cpu.itb]
type=ArmTLB
children=walker
eventq_index=0
is_stage2=false
size=64
walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=20
is_top_level=false
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=20
sequential_access=false
size=4194304
system=system
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.cpu.l2cache.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=20
sequential_access=false
size=4194304
[system.cpu.toL2Bus]
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
snoop_filter=Null
snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=system.clk_domain
transition_latency=100000000
[system.intrctrl]
type=IntrControl
eventq_index=0
sys=system
[system.iobus]
type=NoncoherentXBar
clk_domain=system.clk_domain
eventq_index=0
forward_latency=1
frontend_latency=2
response_latency=2
use_default_range=true
width=16
default=system.realview.pciconfig.pio
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
hit_latency=50
is_top_level=true
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=50
sequential_access=false
size=1024
system=system
tags=system.iocache.tags
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
[system.iocache.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.clk_domain
eventq_index=0
hit_latency=50
sequential_access=false
size=1024
[system.membus]
type=CoherentXBar
children=badaddr_responder
clk_domain=system.clk_domain
eventq_index=0
forward_latency=4
frontend_latency=3
response_latency=2
snoop_filter=Null
snoop_response_latency=4
system=system
use_default_range=false
width=16
default=system.membus.badaddr_responder.pio
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
[system.membus.badaddr_responder]
type=IsaFake
clk_domain=system.clk_domain
eventq_index=0
fake_mem=false
pio_addr=0
pio_latency=100000
pio_size=8
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=warn
pio=system.membus.default
[system.physmem]
type=DRAMCtrl
IDD0=0.075000
IDD02=0.000000
IDD2N=0.050000
IDD2N2=0.000000
IDD2P0=0.000000
IDD2P02=0.000000
IDD2P1=0.000000
IDD2P12=0.000000
IDD3N=0.057000
IDD3N2=0.000000
IDD3P0=0.000000
IDD3P02=0.000000
IDD3P1=0.000000
IDD3P12=0.000000
IDD4R=0.187000
IDD4R2=0.000000
IDD4W=0.165000
IDD4W2=0.000000
IDD5=0.220000
IDD52=0.000000
IDD6=0.000000
IDD62=0.000000
VDD=1.500000
VDD2=0.000000
activation_limit=4
addr_mapping=RoRaBaCoCh
bank_groups_per_rank=0
banks_per_rank=8
burst_length=8
channels=1
clk_domain=system.clk_domain
conf_table_reported=true
device_bus_width=8
device_rowbuffer_size=1024
device_size=536870912
devices_per_rank=8
dll=true
eventq_index=0
in_addr_map=true
max_accesses_per_row=16
mem_sched_policy=frfcfs
min_writes_per_switch=16
null=false
page_policy=open_adaptive
range=2147483648:2415919103
ranks_per_channel=2
read_buffer_size=32
static_backend_latency=10000
static_frontend_latency=10000
tBURST=5000
tCCD_L=0
tCK=1250
tCL=13750
tCS=2500
tRAS=35000
tRCD=13750
tREFI=7800000
tRFC=260000
tRP=13750
tRRD=6000
tRRD_L=0
tRTP=7500
tRTW=2500
tWR=15000
tWTR=7500
tXAW=30000
tXP=0
tXPDLL=0
tXS=0
tXSDLL=0
write_buffer_size=64
write_high_thresh_perc=85
write_low_thresh_perc=50
port=system.membus.master[5]
[system.realview]
type=RealView
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
eventq_index=0
intrctrl=system.intrctrl
pci_cfg_base=805306368
pci_cfg_gen_offsets=false
pci_io_base=0
system=system
[system.realview.aaci_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470024192
pio_latency=100000
system=system
pio=system.iobus.master[18]
[system.realview.cf_ctrl]
type=IdeController
BAR0=471465984
BAR0LegacyIO=true
BAR0Size=256
BAR1=471466240
BAR1LegacyIO=true
BAR1Size=4096
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR3=1
BAR3LegacyIO=false
BAR3Size=4
BAR4=1
BAR4LegacyIO=false
BAR4Size=16
BAR5=1
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=1
Command=1
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=0
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=2
disks=
eventq_index=0
io_shift=2
pci_bus=2
pci_dev=0
pci_func=0
pio_latency=30000
platform=system.realview
system=system
config=system.iobus.master[9]
dma=system.iobus.slave[2]
pio=system.iobus.master[8]
[system.realview.clcd]
type=Pl111
amba_id=1315089
clk_domain=system.clk_domain
enable_capture=true
eventq_index=0
gic=system.realview.gic
int_num=46
pio_addr=471793664
pio_latency=10000
pixel_clock=41667
system=system
vnc=system.vncserver
dma=system.iobus.slave[1]
pio=system.iobus.master[4]
[system.realview.energy_ctrl]
type=EnergyCtrl
clk_domain=system.clk_domain
dvfs_handler=system.dvfs_handler
eventq_index=0
pio_addr=470286336
pio_latency=100000
system=system
pio=system.iobus.master[22]
[system.realview.ethernet]
type=IGbE
BAR0=0
BAR0LegacyIO=false
BAR0Size=131072
BAR1=0
BAR1LegacyIO=false
BAR1Size=0
BAR2=0
BAR2LegacyIO=false
BAR2Size=0
BAR3=0
BAR3LegacyIO=false
BAR3Size=0
BAR4=0
BAR4LegacyIO=false
BAR4Size=0
BAR5=0
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=2
Command=0
DeviceID=4213
ExpansionROM=0
HeaderType=0
InterruptLine=1
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=255
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=0
Revision=0
Status=0
SubClassCode=0
SubsystemID=4104
SubsystemVendorID=32902
VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
eventq_index=0
fetch_comp_delay=10000
fetch_delay=10000
hardware_address=00:90:00:00:00:01
pci_bus=0
pci_dev=0
pci_func=0
phy_epid=896
phy_pid=680
pio_latency=30000
platform=system.realview
rx_desc_cache_size=64
rx_fifo_size=393216
rx_write_delay=0
system=system
tx_desc_cache_size=64
tx_fifo_size=393216
tx_read_delay=0
wb_comp_delay=10000
wb_delay=10000
config=system.iobus.master[26]
dma=system.iobus.slave[4]
pio=system.iobus.master[25]
[system.realview.generic_timer]
type=GenericTimer
eventq_index=0
gic=system.realview.gic
int_num=29
system=system
[system.realview.gic]
type=Pl390
clk_domain=system.clk_domain
cpu_addr=738205696
cpu_pio_delay=10000
dist_addr=738201600
dist_pio_delay=10000
eventq_index=0
int_latency=10000
it_lines=128
msix_addr=0
platform=system.realview
system=system
pio=system.membus.master[2]
[system.realview.hdlcd]
type=HDLcd
amba_id=1314816
clk_domain=system.clk_domain
enable_capture=true
eventq_index=0
gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
system=system
vnc=system.vncserver
dma=system.membus.slave[0]
pio=system.iobus.master[5]
[system.realview.ide]
type=IdeController
BAR0=1
BAR0LegacyIO=false
BAR0Size=8
BAR1=1
BAR1LegacyIO=false
BAR1Size=4
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR3=1
BAR3LegacyIO=false
BAR3Size=4
BAR4=1
BAR4LegacyIO=false
BAR4Size=16
BAR5=1
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=1
Command=0
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=2
InterruptPin=2
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=0
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=0
disks=system.cf0
eventq_index=0
io_shift=0
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=30000
platform=system.realview
system=system
config=system.iobus.master[24]
dma=system.iobus.slave[3]
pio=system.iobus.master[23]
[system.realview.kmi0]
type=Pl050
amba_id=1314896
clk_domain=system.clk_domain
eventq_index=0
gic=system.realview.gic
int_delay=1000000
int_num=44
is_mouse=false
pio_addr=470155264
pio_latency=100000
system=system
vnc=system.vncserver
pio=system.iobus.master[6]
[system.realview.kmi1]
type=Pl050
amba_id=1314896
clk_domain=system.clk_domain
eventq_index=0
gic=system.realview.gic
int_delay=1000000
int_num=45
is_mouse=true
pio_addr=470220800
pio_latency=100000
system=system
vnc=system.vncserver
pio=system.iobus.master[7]
[system.realview.l2x0_fake]
type=IsaFake
clk_domain=system.clk_domain
eventq_index=0
fake_mem=false
pio_addr=739246080
pio_latency=100000
pio_size=4095
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.master[12]
[system.realview.lan_fake]
type=IsaFake
clk_domain=system.clk_domain
eventq_index=0
fake_mem=false
pio_addr=436207616
pio_latency=100000
pio_size=65535
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.master[19]
[system.realview.local_cpu_timer]
type=CpuLocalTimer
clk_domain=system.clk_domain
eventq_index=0
gic=system.realview.gic
int_num_timer=29
int_num_watchdog=30
pio_addr=738721792
pio_latency=100000
system=system
pio=system.membus.master[3]
[system.realview.mmc_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470089728
pio_latency=100000
system=system
pio=system.iobus.master[21]
[system.realview.nvmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=false
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:67108863
port=system.membus.master[1]
[system.realview.pciconfig]
type=PciConfigAll
bus=0
clk_domain=system.clk_domain
eventq_index=0
pio_addr=0
pio_latency=30000
platform=system.realview
size=268435456
system=system
pio=system.iobus.default
[system.realview.realview_io]
type=RealViewCtrl
clk_domain=system.clk_domain
eventq_index=0
idreg=35979264
pio_addr=469827584
pio_latency=100000
proc_id0=335544320
proc_id1=335544320
system=system
pio=system.iobus.master[1]
[system.realview.rtc]
type=PL031
amba_id=3412017
clk_domain=system.clk_domain
eventq_index=0
gic=system.realview.gic
int_delay=100000
int_num=36
pio_addr=471269376
pio_latency=100000
system=system
time=Thu Jan 1 00:00:00 2009
pio=system.iobus.master[10]
[system.realview.sp810_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=true
pio_addr=469893120
pio_latency=100000
system=system
pio=system.iobus.master[16]
[system.realview.timer0]
type=Sp804
amba_id=1316868
clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
eventq_index=0
gic=system.realview.gic
int_num0=34
int_num1=34
pio_addr=470876160
pio_latency=100000
system=system
pio=system.iobus.master[2]
[system.realview.timer1]
type=Sp804
amba_id=1316868
clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
eventq_index=0
gic=system.realview.gic
int_num0=35
int_num1=35
pio_addr=470941696
pio_latency=100000
system=system
pio=system.iobus.master[3]
[system.realview.uart]
type=Pl011
clk_domain=system.clk_domain
end_on_eot=false
eventq_index=0
gic=system.realview.gic
int_delay=100000
int_num=37
pio_addr=470351872
pio_latency=100000
platform=system.realview
system=system
terminal=system.terminal
pio=system.iobus.master[0]
[system.realview.uart1_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470417408
pio_latency=100000
system=system
pio=system.iobus.master[13]
[system.realview.uart2_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470482944
pio_latency=100000
system=system
pio=system.iobus.master[14]
[system.realview.uart3_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470548480
pio_latency=100000
system=system
pio=system.iobus.master[15]
[system.realview.usb_fake]
type=IsaFake
clk_domain=system.clk_domain
eventq_index=0
fake_mem=false
pio_addr=452984832
pio_latency=100000
pio_size=131071
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.master[20]
[system.realview.vgic]
type=VGic
clk_domain=system.clk_domain
eventq_index=0
gic=system.realview.gic
hv_addr=738213888
pio_delay=10000
platform=system.realview
ppint=25
system=system
vcpu_addr=738222080
pio=system.membus.master[4]
[system.realview.vram]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=false
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
range=402653184:436207615
port=system.iobus.master[11]
[system.realview.watchdog_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
eventq_index=0
ignore_access=false
pio_addr=470745088
pio_latency=100000
system=system
pio=system.iobus.master[17]
[system.terminal]
type=Terminal
eventq_index=0
intr_control=system.intrctrl
number=0
output=true
port=3456
[system.vncserver]
type=VncServer
eventq_index=0
frame_capture=false
number=0
port=5900
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000
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