f2daf210f1
src/arch/sparc/process.cc:
MachineBytes doesn't exist any more.
src/arch/sparc/regfile.cc:
Add in the miscRegFile for good measure.
src/cpu/o3/isa_specific.hh:
Add in a section for SPARC
src/cpu/o3/sparc/cpu.cc:
src/cpu/o3/sparc/cpu.hh:
src/cpu/o3/sparc/cpu_builder.cc:
src/cpu/o3/sparc/cpu_impl.hh:
src/cpu/o3/sparc/dyn_inst.cc:
src/cpu/o3/sparc/dyn_inst.hh:
src/cpu/o3/sparc/dyn_inst_impl.hh:
src/cpu/o3/sparc/impl.hh:
src/cpu/o3/sparc/params.hh:
src/cpu/o3/sparc/thread_context.cc:
src/cpu/o3/sparc/thread_context.hh:
Sparc version of this file.
--HG--
extra : convert_revision : 34bb5218f802d0a1328132a518cdd769fb59b6a4
431 lines
16 KiB
C++
431 lines
16 KiB
C++
/*
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* Copyright (c) 2003-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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* Ali Saidi
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*/
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#include "arch/sparc/asi.hh"
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#include "arch/sparc/isa_traits.hh"
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#include "arch/sparc/process.hh"
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#include "arch/sparc/types.hh"
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#include "base/loader/object_file.hh"
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#include "base/loader/elf_object.hh"
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#include "base/misc.hh"
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#include "cpu/thread_context.hh"
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#include "mem/page_table.hh"
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#include "mem/translating_port.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace SparcISA;
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SparcLiveProcess::SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
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System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
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std::vector<std::string> &argv, std::vector<std::string> &envp,
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const std::string &cwd,
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uint64_t _uid, uint64_t _euid, uint64_t _gid, uint64_t _egid,
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uint64_t _pid, uint64_t _ppid)
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: LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd,
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argv, envp, cwd, _uid, _euid, _gid, _egid, _pid, _ppid)
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{
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// XXX all the below need to be updated for SPARC - Ali
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brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
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brk_point = roundUp(brk_point, VMPageSize);
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// Set up stack. On SPARC Linux, stack goes from the top of memory
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// downward, less the hole for the kernel address space.
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stack_base = (Addr)0x80000000000ULL;
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// Set up region for mmaps. Tru64 seems to start just above 0 and
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// grow up from there.
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mmap_start = mmap_end = 0xfffff80000000000ULL;
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// Set pointer for next thread stack. Reserve 8M for main stack.
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next_thread_stack_base = stack_base - (8 * 1024 * 1024);
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//Initialize these to 0s
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fillStart = 0;
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spillStart = 0;
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}
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void
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SparcLiveProcess::startup()
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{
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argsInit(sizeof(IntReg), VMPageSize);
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//From the SPARC ABI
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//The process runs in user mode
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threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02);
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//Setup default FP state
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threadContexts[0]->setMiscReg(MISCREG_FSR, 0);
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threadContexts[0]->setMiscReg(MISCREG_TICK, 0);
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//
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/*
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* Register window management registers
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*/
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//No windows contain info from other programs
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threadContexts[0]->setMiscReg(MISCREG_OTHERWIN, 0);
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//There are no windows to pop
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threadContexts[0]->setMiscReg(MISCREG_CANRESTORE, 0);
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//All windows are available to save into
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threadContexts[0]->setMiscReg(MISCREG_CANSAVE, NWindows - 2);
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//All windows are "clean"
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threadContexts[0]->setMiscReg(MISCREG_CLEANWIN, NWindows);
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//Start with register window 0
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threadContexts[0]->setMiscReg(MISCREG_CWP, 0);
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//Always use spill and fill traps 0
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threadContexts[0]->setMiscReg(MISCREG_WSTATE, 0);
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//Set the trap level to 0
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threadContexts[0]->setMiscReg(MISCREG_TL, 0);
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//Set the ASI register to something fixed
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threadContexts[0]->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
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}
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m5_auxv_t buildAuxVect(int64_t type, int64_t val)
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{
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m5_auxv_t result;
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result.a_type = TheISA::htog(type);
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result.a_val = TheISA::htog(val);
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return result;
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}
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//We only use 19 instructions for the trap handlers, but there would be
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//space for 32 in a real SPARC trap table.
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const int numFillInsts = 32;
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const int numSpillInsts = 32;
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MachInst fillHandler[numFillInsts] =
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{
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htog(0x87802018), //wr %g0, ASI_AIUP, %asi
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htog(0xe0dba7ff), //ldxa [%sp + BIAS + (0*8)] %asi, %l0
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htog(0xe2dba807), //ldxa [%sp + BIAS + (1*8)] %asi, %l1
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htog(0xe4dba80f), //ldxa [%sp + BIAS + (2*8)] %asi, %l2
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htog(0xe6dba817), //ldxa [%sp + BIAS + (3*8)] %asi, %l3
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htog(0xe8dba81f), //ldxa [%sp + BIAS + (4*8)] %asi, %l4
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htog(0xeadba827), //ldxa [%sp + BIAS + (5*8)] %asi, %l5
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htog(0xecdba82f), //ldxa [%sp + BIAS + (6*8)] %asi, %l6
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htog(0xeedba837), //ldxa [%sp + BIAS + (7*8)] %asi, %l7
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htog(0xf0dba83f), //ldxa [%sp + BIAS + (8*8)] %asi, %i0
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htog(0xf2dba847), //ldxa [%sp + BIAS + (9*8)] %asi, %i1
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htog(0xf4dba84f), //ldxa [%sp + BIAS + (10*8)] %asi, %i2
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htog(0xf6dba857), //ldxa [%sp + BIAS + (11*8)] %asi, %i3
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htog(0xf8dba85f), //ldxa [%sp + BIAS + (12*8)] %asi, %i4
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htog(0xfadba867), //ldxa [%sp + BIAS + (13*8)] %asi, %i5
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htog(0xfcdba86f), //ldxa [%sp + BIAS + (14*8)] %asi, %i6
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htog(0xfedba877), //ldxa [%sp + BIAS + (15*8)] %asi, %i7
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htog(0x83880000), //restored
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htog(0x83F00000), //retry
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000) //illtrap
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};
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MachInst spillHandler[numSpillInsts] =
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{
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htog(0x87802018), //wr %g0, ASI_AIUP, %asi
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htog(0xe0f3a7ff), //stxa %l0, [%sp + BIAS + (0*8)] %asi
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htog(0xe2f3a807), //stxa %l1, [%sp + BIAS + (1*8)] %asi
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htog(0xe4f3a80f), //stxa %l2, [%sp + BIAS + (2*8)] %asi
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htog(0xe6f3a817), //stxa %l3, [%sp + BIAS + (3*8)] %asi
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htog(0xe8f3a81f), //stxa %l4, [%sp + BIAS + (4*8)] %asi
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htog(0xeaf3a827), //stxa %l5, [%sp + BIAS + (5*8)] %asi
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htog(0xecf3a82f), //stxa %l6, [%sp + BIAS + (6*8)] %asi
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htog(0xeef3a837), //stxa %l7, [%sp + BIAS + (7*8)] %asi
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htog(0xf0f3a83f), //stxa %i0, [%sp + BIAS + (8*8)] %asi
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htog(0xf2f3a847), //stxa %i1, [%sp + BIAS + (9*8)] %asi
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htog(0xf4f3a84f), //stxa %i2, [%sp + BIAS + (10*8)] %asi
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htog(0xf6f3a857), //stxa %i3, [%sp + BIAS + (11*8)] %asi
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htog(0xf8f3a85f), //stxa %i4, [%sp + BIAS + (12*8)] %asi
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htog(0xfaf3a867), //stxa %i5, [%sp + BIAS + (13*8)] %asi
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htog(0xfcf3a86f), //stxa %i6, [%sp + BIAS + (14*8)] %asi
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htog(0xfef3a877), //stxa %i7, [%sp + BIAS + (15*8)] %asi
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htog(0x81880000), //saved
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htog(0x83F00000), //retry
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000), //illtrap
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htog(0x00000000) //illtrap
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};
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void
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SparcLiveProcess::argsInit(int intSize, int pageSize)
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{
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Process::startup();
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string filename;
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if(argv.size() < 1)
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filename = "";
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else
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filename = argv[0];
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Addr alignmentMask = ~(intSize - 1);
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// load object file into target memory
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objFile->loadSections(initVirtMem);
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//These are the auxilliary vector types
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enum auxTypes
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{
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SPARC_AT_HWCAP = 16,
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SPARC_AT_PAGESZ = 6,
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SPARC_AT_CLKTCK = 17,
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SPARC_AT_PHDR = 3,
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SPARC_AT_PHENT = 4,
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SPARC_AT_PHNUM = 5,
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SPARC_AT_BASE = 7,
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SPARC_AT_FLAGS = 8,
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SPARC_AT_ENTRY = 9,
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SPARC_AT_UID = 11,
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SPARC_AT_EUID = 12,
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SPARC_AT_GID = 13,
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SPARC_AT_EGID = 14,
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SPARC_AT_SECURE = 23
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};
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enum hardwareCaps
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{
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M5_HWCAP_SPARC_FLUSH = 1,
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M5_HWCAP_SPARC_STBAR = 2,
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M5_HWCAP_SPARC_SWAP = 4,
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M5_HWCAP_SPARC_MULDIV = 8,
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M5_HWCAP_SPARC_V9 = 16,
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//This one should technically only be set
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//if there is a cheetah or cheetah_plus tlb,
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//but we'll use it all the time
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M5_HWCAP_SPARC_ULTRA3 = 32
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};
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const int64_t hwcap =
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M5_HWCAP_SPARC_FLUSH |
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M5_HWCAP_SPARC_STBAR |
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M5_HWCAP_SPARC_SWAP |
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M5_HWCAP_SPARC_MULDIV |
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M5_HWCAP_SPARC_V9 |
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M5_HWCAP_SPARC_ULTRA3;
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//Setup the auxilliary vectors. These will already have endian conversion.
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//Auxilliary vectors are loaded only for elf formatted executables.
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ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
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if(elfObject)
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{
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//Bits which describe the system hardware capabilities
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auxv.push_back(buildAuxVect(SPARC_AT_HWCAP, hwcap));
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//The system page size
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auxv.push_back(buildAuxVect(SPARC_AT_PAGESZ, SparcISA::VMPageSize));
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//Defined to be 100 in the kernel source.
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//Frequency at which times() increments
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auxv.push_back(buildAuxVect(SPARC_AT_CLKTCK, 100));
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// For statically linked executables, this is the virtual address of the
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// program header tables if they appear in the executable image
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auxv.push_back(buildAuxVect(SPARC_AT_PHDR, elfObject->programHeaderTable()));
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// This is the size of a program header entry from the elf file.
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auxv.push_back(buildAuxVect(SPARC_AT_PHENT, elfObject->programHeaderSize()));
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// This is the number of program headers from the original elf file.
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auxv.push_back(buildAuxVect(SPARC_AT_PHNUM, elfObject->programHeaderCount()));
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//This is the address of the elf "interpreter", It should be set
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//to 0 for regular executables. It should be something else
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//(not sure what) for dynamic libraries.
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auxv.push_back(buildAuxVect(SPARC_AT_BASE, 0));
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//This is hardwired to 0 in the elf loading code in the kernel
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auxv.push_back(buildAuxVect(SPARC_AT_FLAGS, 0));
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//The entry point to the program
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auxv.push_back(buildAuxVect(SPARC_AT_ENTRY, objFile->entryPoint()));
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//Different user and group IDs
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auxv.push_back(buildAuxVect(SPARC_AT_UID, uid()));
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auxv.push_back(buildAuxVect(SPARC_AT_EUID, euid()));
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auxv.push_back(buildAuxVect(SPARC_AT_GID, gid()));
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auxv.push_back(buildAuxVect(SPARC_AT_EGID, egid()));
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//Whether to enable "secure mode" in the executable
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auxv.push_back(buildAuxVect(SPARC_AT_SECURE, 0));
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}
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//Figure out how big the initial stack needs to be
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// The unaccounted for 0 at the top of the stack
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int mysterious_size = intSize;
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//This is the name of the file which is present on the initial stack
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//It's purpose is to let the user space linker examine the original file.
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int file_name_size = filename.size() + 1;
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int env_data_size = 0;
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for (int i = 0; i < envp.size(); ++i) {
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env_data_size += envp[i].size() + 1;
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}
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int arg_data_size = 0;
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for (int i = 0; i < argv.size(); ++i) {
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arg_data_size += argv[i].size() + 1;
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}
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//The info_block needs to be padded so it's size is a multiple of the
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//alignment mask. Also, it appears that there needs to be at least some
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//padding, so if the size is already a multiple, we need to increase it
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//anyway.
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int info_block_size =
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(file_name_size +
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env_data_size +
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arg_data_size +
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intSize) & alignmentMask;
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int info_block_padding =
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info_block_size -
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file_name_size -
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env_data_size -
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arg_data_size;
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//Each auxilliary vector is two 8 byte words
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int aux_array_size = intSize * 2 * (auxv.size() + 1);
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int envp_array_size = intSize * (envp.size() + 1);
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int argv_array_size = intSize * (argv.size() + 1);
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int argc_size = intSize;
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int window_save_size = intSize * 16;
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int space_needed =
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mysterious_size +
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info_block_size +
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aux_array_size +
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envp_array_size +
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argv_array_size +
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argc_size +
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window_save_size;
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stack_min = stack_base - space_needed;
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stack_min &= alignmentMask;
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stack_size = stack_base - stack_min;
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// map memory
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pTable->allocate(roundDown(stack_min, pageSize),
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roundUp(stack_size, pageSize));
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// map out initial stack contents
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Addr mysterious_base = stack_base - mysterious_size;
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Addr file_name_base = mysterious_base - file_name_size;
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Addr env_data_base = file_name_base - env_data_size;
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Addr arg_data_base = env_data_base - arg_data_size;
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Addr auxv_array_base = arg_data_base - aux_array_size - info_block_padding;
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Addr envp_array_base = auxv_array_base - envp_array_size;
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Addr argv_array_base = envp_array_base - argv_array_size;
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Addr argc_base = argv_array_base - argc_size;
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#ifndef NDEBUG
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// only used in DPRINTF
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Addr window_save_base = argc_base - window_save_size;
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#endif
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DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
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DPRINTF(Sparc, "0x%x - file name\n", file_name_base);
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DPRINTF(Sparc, "0x%x - env data\n", env_data_base);
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DPRINTF(Sparc, "0x%x - arg data\n", arg_data_base);
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DPRINTF(Sparc, "0x%x - auxv array\n", auxv_array_base);
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DPRINTF(Sparc, "0x%x - envp array\n", envp_array_base);
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DPRINTF(Sparc, "0x%x - argv array\n", argv_array_base);
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DPRINTF(Sparc, "0x%x - argc \n", argc_base);
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DPRINTF(Sparc, "0x%x - window save\n", window_save_base);
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DPRINTF(Sparc, "0x%x - stack min\n", stack_min);
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// write contents to stack
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// figure out argc
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uint64_t argc = argv.size();
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uint64_t guestArgc = TheISA::htog(argc);
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//Write out the mysterious 0
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uint64_t mysterious_zero = 0;
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initVirtMem->writeBlob(mysterious_base,
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(uint8_t*)&mysterious_zero, mysterious_size);
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//Write the file name
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initVirtMem->writeString(file_name_base, filename.c_str());
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//Copy the aux stuff
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for(int x = 0; x < auxv.size(); x++)
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{
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initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
|
|
(uint8_t*)&(auxv[x].a_type), intSize);
|
|
initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
|
|
(uint8_t*)&(auxv[x].a_val), intSize);
|
|
}
|
|
//Write out the terminating zeroed auxilliary vector
|
|
const uint64_t zero = 0;
|
|
initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
|
|
(uint8_t*)&zero, 2 * intSize);
|
|
|
|
copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
|
|
copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
|
|
|
|
initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
|
|
|
|
//Stuff the trap handlers into the processes address space.
|
|
//Since the stack grows down and is the highest area in the processes
|
|
//address space, we can put stuff above it and stay out of the way.
|
|
int fillSize = sizeof(MachInst) * numFillInsts;
|
|
int spillSize = sizeof(MachInst) * numSpillInsts;
|
|
fillStart = stack_base;
|
|
spillStart = fillStart + fillSize;
|
|
initVirtMem->writeBlob(fillStart, (uint8_t*)fillHandler, fillSize);
|
|
initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler, spillSize);
|
|
|
|
//Set up the thread context to start running the process
|
|
threadContexts[0]->setIntReg(ArgumentReg0, argc);
|
|
threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
|
|
threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
|
|
|
|
Addr prog_entry = objFile->entryPoint();
|
|
threadContexts[0]->setPC(prog_entry);
|
|
threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
|
|
threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
|
|
|
|
// num_processes++;
|
|
}
|