gem5/src/arch
Ali Saidi 8af1eeec6f ARM: Use CPU local lock before sending load to mem system.
This change uses the locked_mem.hh header to handle implementing CLREX. It
simplifies the current implementation greatly.
2011-04-04 11:42:29 -05:00
..
alpha ARM: Cleanup implementation of ITSTATE and put important code in PCState. 2011-04-04 11:42:28 -05:00
arm ARM: Use CPU local lock before sending load to mem system. 2011-04-04 11:42:29 -05:00
generic X86: Define fault objects to carry debug messages. 2011-02-13 17:42:05 -08:00
mips ARM: Cleanup implementation of ITSTATE and put important code in PCState. 2011-04-04 11:42:28 -05:00
noisa SCons: Support building without an ISA 2010-11-19 18:00:39 -06:00
power ARM: Cleanup implementation of ITSTATE and put important code in PCState. 2011-04-04 11:42:28 -05:00
sparc ARM: Cleanup implementation of ITSTATE and put important code in PCState. 2011-04-04 11:42:28 -05:00
x86 ARM: Cleanup implementation of ITSTATE and put important code in PCState. 2011-04-04 11:42:28 -05:00
isa_parser.py ISA parser: Set up op_src_decl and op_dest_decl for pc operands. 2011-03-24 13:55:16 -04:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript Spelling: Fix the a spelling error by changing mmaped to mmapped. 2011-03-01 23:18:47 -08:00