5fb00e1df6
This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations: * tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3) Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process. The in-order CPU model was not included in any of the tests as it does not support CPU handover.
138 lines
5.4 KiB
Python
138 lines
5.4 KiB
Python
# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Andreas Sandberg
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import m5
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from m5.objects import *
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m5.util.addToPath('../configs/common')
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from Caches import *
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def _memMode(cclass):
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if cclass == AtomicSimpleCPU:
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return "atomic", m5.objects.params.atomic
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else:
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return "timing", m5.objects.params.timing
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class Sequential:
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"""Sequential CPU switcher.
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The sequential CPU switches between all CPUs in a system in
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order. The CPUs in the system must have been prepared for
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switching, which in practice means that only one CPU is switched
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in. base_config.BaseFSSwitcheroo can be used to create such a
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system.
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"""
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def __init__(self, cpus):
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self.first_cpu = None
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for (cpuno, cpu) in enumerate(cpus):
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if not cpu.switched_out:
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if self.first_cpu != None:
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fatal("More than one CPU is switched in");
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self.first_cpu = cpuno
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if self.first_cpu == None:
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fatal("The system contains no switched in CPUs")
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self.cur_cpu = self.first_cpu
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self.cpus = cpus
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def next(self):
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self.cur_cpu = (self.cur_cpu + 1) % len(self.cpus)
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return self.cpus[self.cur_cpu]
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def first(self):
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return self.cpus[self.first_cpu]
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def run_test(root, switcher=None, freq=1000):
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"""Test runner for CPU switcheroo tests.
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The switcheroo test runner is used to switch CPUs in a system that
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has been prepared for CPU switching. Such systems should have
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multiple CPUs when they are instantiated, but only one should be
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switched in. Such configurations can be created using the
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base_config.BaseFSSwitcheroo class.
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A CPU switcher object is used to control switching. The default
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switcher sequentially switches between all CPUs in a system,
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starting with the CPU that is currently switched in.
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Unlike most other test runners, this one automatically configures
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the memory mode of the system based on the first CPU the switcher
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reports.
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Keyword Arguments:
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switcher -- CPU switcher implementation. See Sequential for
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an example implementation.
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period -- Switching frequency in Hz.
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"""
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if switcher == None:
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switcher = Sequential(root.system.cpu)
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current_cpu = switcher.first()
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system = root.system
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system.mem_mode = _memMode(type(current_cpu))[0]
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# instantiate configuration
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m5.instantiate()
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# Determine the switching period, this has to be done after
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# instantiating the system since the time base must be fixed.
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period = m5.ticks.fromSeconds(1.0 / freq)
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while True:
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exit_event = m5.simulate(period)
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exit_cause = exit_event.getCause()
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if exit_cause == "simulate() limit reached":
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next_cpu = switcher.next()
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print "Switching CPUs..."
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print "Next CPU: %s" % type(next_cpu)
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m5.drain(system)
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system.setMemoryMode(_memMode(type(next_cpu))[1])
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if current_cpu != next_cpu:
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m5.switchCpus([ (current_cpu, next_cpu) ])
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else:
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print "Source CPU and destination CPU are the same, skipping..."
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m5.resume(system)
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current_cpu = next_cpu
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elif exit_cause == "target called exit()" or \
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exit_cause == "m5_exit instruction encountered":
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sys.exit(0)
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else:
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print "Test failed: Unknown exit cause: %s" % exit_cause
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sys.exit(1)
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