80d9be86e6
Even though we're not incorrect about operator precedence, let's add some parens in some particularly confusing places to placate GCC 4.3 so that we don't have to turn the warning off. Agreed that this is a bit of a pain for those users who get the order of operations correct, but it is likely to prevent bugs in certain cases.
478 lines
17 KiB
C++
478 lines
17 KiB
C++
/*
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* Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* Redistribution and use of this software in source and binary forms,
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* with or without modification, are permitted provided that the
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* following conditions are met:
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*
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* The software must be used only for Non-Commercial Use which means any
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* use which is NOT directed to receiving any direct monetary
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* compensation for, or commercial advantage from such use. Illustrative
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* examples of non-commercial use are academic research, personal study,
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* teaching, education and corporate research & development.
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* Illustrative examples of commercial use are distributing products for
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* commercial advantage and providing services using the software for
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* commercial advantage.
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*
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* If you wish to use this software or functionality therein that may be
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* covered by patents for commercial use, please contact:
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* Director of Intellectual Property Licensing
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* Office of Strategy and Technology
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* Hewlett-Packard Company
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* 1501 Page Mill Road
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* Palo Alto, California 94304
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*
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* Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer. Redistributions
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* in binary form must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution. Neither the name of
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* the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission. No right of
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* sublicense is granted herewith. Derivatives of the software and
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* output created using the software may be prepared, but only for
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* Non-Commercial Uses. Derivatives of the software may be shared with
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* others provided: (i) the others agree to abide by the list of
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* conditions herein which includes the Non-Commercial Use restrictions;
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* and (ii) such Derivatives of the software include the above copyright
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* notice to acknowledge the contribution from this software where
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* applicable, this list of conditions and the disclaimer below.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/x86/miscregs.hh"
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#include "arch/x86/predecoder.hh"
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "sim/host.hh"
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namespace X86ISA
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{
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void Predecoder::doReset()
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{
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origPC = basePC + offset;
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DPRINTF(Predecoder, "Setting origPC to %#x\n", origPC);
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emi.rex = 0;
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emi.legacy = 0;
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emi.opcode.num = 0;
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emi.opcode.op = 0;
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emi.opcode.prefixA = emi.opcode.prefixB = 0;
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immediateCollected = 0;
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emi.immediate = 0;
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emi.displacement = 0;
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emi.modRM = 0;
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emi.sib = 0;
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HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
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emi.mode.mode = m5reg.mode;
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emi.mode.submode = m5reg.submode;
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}
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void Predecoder::process()
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{
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//This function drives the predecoder state machine.
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//Some sanity checks. You shouldn't try to process more bytes if
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//there aren't any, and you shouldn't overwrite an already
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//predecoder ExtMachInst.
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assert(!outOfBytes);
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assert(!emiIsReady);
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//While there's still something to do...
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while(!emiIsReady && !outOfBytes)
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{
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uint8_t nextByte = getNextByte();
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switch(state)
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{
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case ResetState:
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doReset();
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state = PrefixState;
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case PrefixState:
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state = doPrefixState(nextByte);
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break;
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case OpcodeState:
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state = doOpcodeState(nextByte);
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break;
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case ModRMState:
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state = doModRMState(nextByte);
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break;
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case SIBState:
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state = doSIBState(nextByte);
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break;
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case DisplacementState:
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state = doDisplacementState();
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break;
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case ImmediateState:
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state = doImmediateState();
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break;
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case ErrorState:
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panic("Went to the error state in the predecoder.\n");
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default:
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panic("Unrecognized state! %d\n", state);
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}
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}
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}
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//Either get a prefix and record it in the ExtMachInst, or send the
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//state machine on to get the opcode(s).
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Predecoder::State Predecoder::doPrefixState(uint8_t nextByte)
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{
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uint8_t prefix = Prefixes[nextByte];
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State nextState = PrefixState;
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if(prefix)
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consumeByte();
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switch(prefix)
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{
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//Operand size override prefixes
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case OperandSizeOverride:
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DPRINTF(Predecoder, "Found operand size override prefix.\n");
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emi.legacy.op = true;
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break;
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case AddressSizeOverride:
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DPRINTF(Predecoder, "Found address size override prefix.\n");
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emi.legacy.addr = true;
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break;
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//Segment override prefixes
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case CSOverride:
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case DSOverride:
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case ESOverride:
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case FSOverride:
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case GSOverride:
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case SSOverride:
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DPRINTF(Predecoder, "Found segment override.\n");
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emi.legacy.seg = prefix;
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break;
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case Lock:
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DPRINTF(Predecoder, "Found lock prefix.\n");
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emi.legacy.lock = true;
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break;
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case Rep:
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DPRINTF(Predecoder, "Found rep prefix.\n");
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emi.legacy.rep = true;
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break;
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case Repne:
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DPRINTF(Predecoder, "Found repne prefix.\n");
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emi.legacy.repne = true;
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break;
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case RexPrefix:
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DPRINTF(Predecoder, "Found Rex prefix %#x.\n", nextByte);
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emi.rex = nextByte;
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break;
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case 0:
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nextState = OpcodeState;
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break;
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default:
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panic("Unrecognized prefix %#x\n", nextByte);
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}
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return nextState;
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}
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//Load all the opcodes (currently up to 2) and then figure out
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//what immediate and/or ModRM is needed.
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Predecoder::State Predecoder::doOpcodeState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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emi.opcode.num++;
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//We can't handle 3+ byte opcodes right now
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assert(emi.opcode.num < 3);
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consumeByte();
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if(emi.opcode.num == 1 && nextByte == 0x0f)
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{
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nextState = OpcodeState;
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DPRINTF(Predecoder, "Found two byte opcode.\n");
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emi.opcode.prefixA = nextByte;
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}
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else if(emi.opcode.num == 2 &&
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(nextByte == 0x0f ||
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(nextByte & 0xf8) == 0x38))
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{
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panic("Three byte opcodes aren't yet supported!\n");
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nextState = OpcodeState;
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DPRINTF(Predecoder, "Found three byte opcode.\n");
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emi.opcode.prefixB = nextByte;
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}
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else
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{
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DPRINTF(Predecoder, "Found opcode %#x.\n", nextByte);
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emi.opcode.op = nextByte;
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SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR);
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//Figure out the effective operand size. This can be overriden to
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//a fixed value at the decoder level.
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int logOpSize;
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if (emi.mode.submode == SixtyFourBitMode)
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{
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if(emi.rex.w)
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logOpSize = 3; // 64 bit operand size
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else if(emi.legacy.op)
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logOpSize = 1; // 16 bit operand size
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else
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logOpSize = 2; // 32 bit operand size
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}
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else if(csAttr.defaultSize)
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{
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if(emi.legacy.op)
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logOpSize = 1; // 16 bit operand size
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else
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logOpSize = 2; // 32 bit operand size
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}
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else // 16 bit default operand size
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{
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if(emi.legacy.op)
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logOpSize = 2; // 32 bit operand size
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else
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logOpSize = 1; // 16 bit operand size
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}
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//Set the actual op size
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emi.opSize = 1 << logOpSize;
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//Figure out the effective address size. This can be overriden to
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//a fixed value at the decoder level.
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int logAddrSize;
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if(emi.mode.submode == SixtyFourBitMode)
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{
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if(emi.legacy.addr)
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logAddrSize = 2; // 32 bit address size
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else
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logAddrSize = 3; // 64 bit address size
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}
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else if(csAttr.defaultSize)
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{
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if(emi.legacy.addr)
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logAddrSize = 1; // 16 bit address size
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else
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logAddrSize = 2; // 32 bit address size
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}
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else // 16 bit default operand size
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{
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if(emi.legacy.addr)
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logAddrSize = 2; // 32 bit address size
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else
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logAddrSize = 1; // 16 bit address size
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}
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SegAttr ssAttr = tc->readMiscRegNoEffect(MISCREG_SS_ATTR);
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//Figure out the effective stack width. This can be overriden to
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//a fixed value at the decoder level.
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if(emi.mode.submode == SixtyFourBitMode)
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emi.stackSize = 8; // 64 bit stack width
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else if(ssAttr.defaultSize)
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emi.stackSize = 4; // 32 bit stack width
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else
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emi.stackSize = 2; // 16 bit stack width
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//Set the actual address size
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emi.addrSize = 1 << logAddrSize;
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//Figure out how big of an immediate we'll retreive based
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//on the opcode.
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int immType = ImmediateType[emi.opcode.num - 1][nextByte];
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if (emi.opcode.num == 1 && nextByte >= 0xA0 && nextByte <= 0xA3)
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immediateSize = SizeTypeToSize[logAddrSize - 1][immType];
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else
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immediateSize = SizeTypeToSize[logOpSize - 1][immType];
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//Determine what to expect next
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if (UsesModRM[emi.opcode.num - 1][nextByte]) {
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nextState = ModRMState;
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} else {
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if(immediateSize) {
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nextState = ImmediateState;
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} else {
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emiIsReady = true;
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nextState = ResetState;
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}
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}
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}
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return nextState;
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}
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//Get the ModRM byte and determine what displacement, if any, there is.
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//Also determine whether or not to get the SIB byte, displacement, or
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//immediate next.
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Predecoder::State Predecoder::doModRMState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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ModRM modRM;
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modRM = nextByte;
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DPRINTF(Predecoder, "Found modrm byte %#x.\n", nextByte);
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SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR);
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if (emi.mode.submode != SixtyFourBitMode &&
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!csAttr.defaultSize) {
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//figure out 16 bit displacement size
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if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2)
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displacementSize = 2;
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else if (modRM.mod == 1)
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displacementSize = 1;
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else
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displacementSize = 0;
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} else {
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//figure out 32/64 bit displacement size
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if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2)
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displacementSize = 4;
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else if (modRM.mod == 1)
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displacementSize = 1;
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else
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displacementSize = 0;
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}
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// The "test" instruction in group 3 needs an immediate, even though
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// the other instructions with the same actual opcode don't.
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if (emi.opcode.num == 1 && (modRM.reg & 0x6) == 0) {
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if (emi.opcode.op == 0xF6)
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immediateSize = 1;
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else if (emi.opcode.op == 0xF7)
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immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
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}
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//If there's an SIB, get that next.
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//There is no SIB in 16 bit mode.
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if (modRM.rm == 4 && modRM.mod != 3) {
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// && in 32/64 bit mode)
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nextState = SIBState;
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} else if(displacementSize) {
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nextState = DisplacementState;
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} else if(immediateSize) {
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nextState = ImmediateState;
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} else {
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emiIsReady = true;
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nextState = ResetState;
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}
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//The ModRM byte is consumed no matter what
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consumeByte();
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emi.modRM = modRM;
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return nextState;
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}
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//Get the SIB byte. We don't do anything with it at this point, other
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//than storing it in the ExtMachInst. Determine if we need to get a
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//displacement or immediate next.
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Predecoder::State Predecoder::doSIBState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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emi.sib = nextByte;
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DPRINTF(Predecoder, "Found SIB byte %#x.\n", nextByte);
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consumeByte();
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if (emi.modRM.mod == 0 && emi.sib.base == 5)
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displacementSize = 4;
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if (displacementSize) {
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nextState = DisplacementState;
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} else if(immediateSize) {
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nextState = ImmediateState;
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} else {
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emiIsReady = true;
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nextState = ResetState;
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}
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return nextState;
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}
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//Gather up the displacement, or at least as much of it
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//as we can get.
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Predecoder::State Predecoder::doDisplacementState()
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{
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State nextState = ErrorState;
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getImmediate(immediateCollected,
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emi.displacement,
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displacementSize);
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DPRINTF(Predecoder, "Collecting %d byte displacement, got %d bytes.\n",
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displacementSize, immediateCollected);
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if(displacementSize == immediateCollected) {
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//Reset this for other immediates.
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immediateCollected = 0;
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//Sign extend the displacement
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switch(displacementSize)
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{
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case 1:
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emi.displacement = sext<8>(emi.displacement);
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break;
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case 2:
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emi.displacement = sext<16>(emi.displacement);
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break;
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case 4:
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emi.displacement = sext<32>(emi.displacement);
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break;
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default:
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panic("Undefined displacement size!\n");
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}
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DPRINTF(Predecoder, "Collected displacement %#x.\n",
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emi.displacement);
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if(immediateSize) {
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nextState = ImmediateState;
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} else {
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emiIsReady = true;
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nextState = ResetState;
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}
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}
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else
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nextState = DisplacementState;
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return nextState;
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}
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//Gather up the immediate, or at least as much of it
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//as we can get
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Predecoder::State Predecoder::doImmediateState()
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{
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State nextState = ErrorState;
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getImmediate(immediateCollected,
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emi.immediate,
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immediateSize);
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DPRINTF(Predecoder, "Collecting %d byte immediate, got %d bytes.\n",
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immediateSize, immediateCollected);
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if(immediateSize == immediateCollected)
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{
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//Reset this for other immediates.
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immediateCollected = 0;
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//XXX Warning! The following is an observed pattern and might
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//not always be true!
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//Instructions which use 64 bit operands but 32 bit immediates
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//need to have the immediate sign extended to 64 bits.
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//Instructions which use true 64 bit immediates won't be
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//affected, and instructions that use true 32 bit immediates
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//won't notice.
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switch(immediateSize)
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{
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case 4:
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emi.immediate = sext<32>(emi.immediate);
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break;
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case 1:
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emi.immediate = sext<8>(emi.immediate);
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}
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DPRINTF(Predecoder, "Collected immediate %#x.\n",
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emi.immediate);
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emiIsReady = true;
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nextState = ResetState;
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}
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else
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nextState = ImmediateState;
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return nextState;
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}
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}
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