gem5/configs/common
Mrinmoy Ghosh 6fc0094337 Cache: add a response latency to the caches
In the current caches the hit latency is paid twice on a miss. This patch lets
a configurable response latency be set of the cache for the backward path.
2012-09-25 11:49:41 -05:00
..
Benchmarks.py configs: add run scripts for ics/gb versions of android and bbench 2012-06-11 11:07:42 -04:00
CacheConfig.py Bus: Split the bus into a non-coherent and coherent bus 2012-05-31 13:30:04 -04:00
Caches.py Cache: add a response latency to the caches 2012-09-25 11:49:41 -05:00
cpu2000.py cpu2000: Add missing art benchmark to all 2012-01-09 18:08:20 -06:00
FSConfig.py AddrRange: Simplify AddrRange params Python hierarchy 2012-09-19 06:15:41 -04:00
O3_ARM_v7a.py Cache: add a response latency to the caches 2012-09-25 11:49:41 -05:00
Options.py se.py: support specifying multiple programs via command line 2012-09-09 09:33:45 -05:00
Simulation.py Standard Switch: Drain the system before switching CPUs 2012-09-12 21:41:37 -05:00
SysPaths.py make rcS files read from the m5 source directory, not /dist. 2006-11-08 14:10:25 -05:00