SConscript: Separate Alpha EIO from syscall building for other architectures arch/isa_specific.hh: change MIPS constant to 34k arch/mips/isa/decoder.isa: Allow sll,ssnop,nop, and ehb to be determined through decoder using the different types of default cases arch/mips/isa/formats/branch.isa: Delete debug code arch/mips/isa/formats/noop.isa: add a Nop format arch/mips/isa_traits.hh: use constants instead of enums arch/mips/process.cc: point to the correct header file cpu/simple/cpu.cc: Output the actual fault name sim/process.cc: Inititalize NNPC --HG-- extra : convert_revision : adb0026dfad25b14c98fb03c98bfe9c681bba6f8
94 lines
2.3 KiB
C++
94 lines
2.3 KiB
C++
// -*- mode:c++ -*-
|
|
|
|
////////////////////////////////////////////////////////////////////
|
|
//
|
|
// Nop
|
|
//
|
|
|
|
output header {{
|
|
/**
|
|
* Static instruction class for no-ops. This is a leaf class.
|
|
*/
|
|
class Nop : public MipsStaticInst
|
|
{
|
|
/// Disassembly of original instruction.
|
|
const std::string originalDisassembly;
|
|
|
|
public:
|
|
/// Constructor
|
|
Nop(const std::string _originalDisassembly, MachInst _machInst)
|
|
: MipsStaticInst("nop", _machInst, No_OpClass),
|
|
originalDisassembly(_originalDisassembly)
|
|
{
|
|
flags[IsNop] = true;
|
|
}
|
|
|
|
~Nop() { }
|
|
|
|
std::string
|
|
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
|
|
|
|
%(BasicExecDeclare)s
|
|
};
|
|
}};
|
|
|
|
output decoder {{
|
|
std::string Nop::generateDisassembly(Addr pc,
|
|
const SymbolTable *symtab) const
|
|
{
|
|
#ifdef SS_COMPATIBLE_DISASSEMBLY
|
|
return originalDisassembly;
|
|
#else
|
|
return csprintf("%-10s (%s)", "nop", originalDisassembly);
|
|
#endif
|
|
}
|
|
|
|
/// Helper function for decoding nops. Substitute Nop object
|
|
/// for original inst passed in as arg (and delete latter).
|
|
inline
|
|
MipsStaticInst *
|
|
makeNop(MipsStaticInst *inst)
|
|
{
|
|
MipsStaticInst *nop = new Nop(inst->disassemble(0), inst->machInst);
|
|
delete inst;
|
|
return nop;
|
|
}
|
|
}};
|
|
|
|
output exec {{
|
|
Fault
|
|
Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
|
|
{
|
|
return NoFault;
|
|
}
|
|
}};
|
|
|
|
// integer & FP operate instructions use RT as dest, so check for
|
|
// RT == 0 to detect nops
|
|
def template OperateNopCheckDecode {{
|
|
{
|
|
MipsStaticInst *i = new %(class_name)s(machInst);
|
|
|
|
//if (RD == 0) {
|
|
// i = makeNop(i);
|
|
//}
|
|
|
|
return i;
|
|
}
|
|
}};
|
|
|
|
|
|
// Like BasicOperate format, but generates NOP if RC/FC == 31
|
|
def format BasicOperateWithNopCheck(code, *opt_args) {{
|
|
iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code),
|
|
opt_args)
|
|
header_output = BasicDeclare.subst(iop)
|
|
decoder_output = BasicConstructor.subst(iop)
|
|
decode_block = OperateNopCheckDecode.subst(iop)
|
|
exec_output = BasicExecute.subst(iop)
|
|
}};
|
|
|
|
def format Nop() {{
|
|
decode_block = 'return new Nop(\"sll r0,r0,0\",machInst);\n'
|
|
}};
|
|
|