Andreas Sandberg fec2dea5c3 x86: Add support for m5ops through a memory mapped interface ... In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.		2013-09-30 12:20:53 +02:00
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boot	rcs scripts: remove bbench.rcS	2013-04-02 12:46:49 -04:00
common	x86: Add support for m5ops through a memory mapped interface	2013-09-30 12:20:53 +02:00
example	configs: Fix ruby_fs.py cache line size	2013-09-17 19:39:11 -05:00
ruby	ruby: network: correct naming of routers	2013-09-06 16:21:33 -05:00
splash2	config: Update script to set cache line size on system	2013-07-18 08:31:19 -04:00
topologies	ruby: network: correct naming of routers	2013-09-06 16:21:33 -05:00