gem5/src/arch/x86/isa/insts
Gabe Black 85f9415a67 Make the operand size reflect the size specifier on the operand tags, and implement NEG
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
2007-07-23 01:07:49 +00:00
..
arithmetic Make the operand size reflect the size specifier on the operand tags, and implement NEG 2007-07-23 01:07:49 +00:00
compare_and_test Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. 2007-07-20 16:39:07 -07:00
control_transfer Implemented and hooked in xchg, rotate with carry, and ret instructions 2007-07-21 19:29:39 -07:00
data_conversion Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
data_transfer Implemented and hooked in xchg, rotate with carry, and ret instructions 2007-07-21 19:29:39 -07:00
flags Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
input_output Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
rotate_and_shift Implemented and hooked in xchg, rotate with carry, and ret instructions 2007-07-21 19:29:39 -07:00
string Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
system Implement UD2 and replace the place holder in the decoder. 2007-07-20 18:27:02 -07:00
__init__.py Implement UD2 and replace the place holder in the decoder. 2007-07-20 18:27:02 -07:00
cache_and_memory_management.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
load_effective_address.py Use the new symbols to clean up the assembler. 2007-06-21 15:30:05 +00:00
load_segment_registers.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
logical.py Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. 2007-07-20 16:39:07 -07:00
no_operation.py Implement the x86 nop to be a "fault" microop which returns "NoFault". 2007-07-18 16:10:44 -07:00
processor_information.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
semaphores.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00
system_calls.py Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 2007-06-08 16:13:20 +00:00