0035440536
dev/tsunami.hh:
Started commenting code
dev/tsunami_cchip.cc:
removed unneccessary config files
dev/tsunami_io.cc:
Added code to see the value written
dev/tsunami_uart.cc:
conviently one of the addresses the SuperI/O southbridge can be is the same space
as the UART. This stops the simulator from panicing although it should probably be
changed a bit.
--HG--
extra : convert_revision : a3334a2c418ee8228089d0e1791fa78bbb276fe5
111 lines
3.6 KiB
C++
111 lines
3.6 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Declaration of top level class for the Tsunami chipset. This class just retains pointers
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* to all its children so the children can communicate
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*/
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#ifndef __TSUNAMI_HH__
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#define __TSUNAMI_HH__
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#include "sim/sim_object.hh"
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class IntrControl;
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class ConsoleListener;
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class SimConsole;
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class ScsiController;
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class TlaserClock;
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class EtherDev;
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class TsunamiCChip;
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class TsunamiPChip;
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class TsunamiPCIConfig;
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/**
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* Top level class for Tsunami Chipset emulation.
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* This structure just contains pointers to all the
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* children so the children can commnicate to do the
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* read work
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*/
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class Tsunami : public SimObject
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{
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public:
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/** Max number of CPUs in a Tsunami */
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static const int Max_CPUs = 4;
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/** Pointer to the interrupt controller (used to post and ack interrupts on the CPU) */
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IntrControl *intrctrl;
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/** Pointer to the UART emulation code */
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SimConsole *cons;
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/** Pointer to the SCSI controller device */
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ScsiController *scsi;
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/** Pointer to the ethernet controller device */
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EtherDev *ethernet;
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/** Pointer to the Tsunami CChip.
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* The chip contains some configuration information and
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* all the interrupt mask and status registers
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*/
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TsunamiCChip *cchip;
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/** Pointer to the Tsunami PChip.
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* The pchip is the interface to the PCI bus, in our case
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* it does not have to do much.
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*/
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TsunamiPChip *pchip;
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/** Pointer to the Tsunami PCI Config Space
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* The config space in tsunami all needs to return
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* -1 if a device is not there.
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*/
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TsunamiPCIConfig *pciconfig;
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int intr_sum_type[Tsunami::Max_CPUs];
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int ipi_pending[Tsunami::Max_CPUs];
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int interrupt_frequency;
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public:
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/**
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* Constructor for the Tsunami Class.
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* @param
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*/
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Tsunami(const std::string &name, ScsiController *scsi,
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EtherDev *ethernet,
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SimConsole *, IntrControl *intctrl, int intrFreq);
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virtual void serialize(std::ostream &os);
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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};
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#endif // __TSUNAMI_HH__
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