This patch takes a first stab at recategorising the regression tests based on actual run times. The simple-atomic and simple-timing runs of vortex and twolf all finish in less than 180 s, and they are consequently moved from long to quick. All realview64 linux-boot regressions take more than 700 s, and they are therefore moved to long. Later patches will rename quick to short, and further divide the regressions into short, medium and long. --HG-- rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simout rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simerr rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simout rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.out => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/smred.out rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/config.ini rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simerr => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/simerr rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simout => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/simout rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/smred.out rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt => 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tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/simerr rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simout => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/simout rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sav rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.twf rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simerr rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simerr rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/test.py => tests/quick/se/70.twolf/test.py
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.068149 # Number of seconds simulated
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sim_ticks 68148672000 # Number of ticks simulated
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final_tick 68148672000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 2078407 # Simulator instruction rate (inst/s)
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host_op_rate 2105318 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 1053881878 # Simulator tick rate (ticks/s)
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host_mem_usage 288492 # Number of bytes of host memory used
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host_seconds 64.66 # Real time elapsed on the host
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sim_insts 134398962 # Number of instructions simulated
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sim_ops 136139190 # Number of ops (including micro ops) simulated
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|
system.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.clk_domain.clock 1000 # Clock period in ticks
|
|
system.physmem.bytes_read::cpu.inst 538214280 # Number of bytes read from this memory
|
|
system.physmem.bytes_read::cpu.data 147559360 # Number of bytes read from this memory
|
|
system.physmem.bytes_read::total 685773640 # Number of bytes read from this memory
|
|
system.physmem.bytes_inst_read::cpu.inst 538214280 # Number of instructions bytes read from this memory
|
|
system.physmem.bytes_inst_read::total 538214280 # Number of instructions bytes read from this memory
|
|
system.physmem.bytes_written::cpu.data 89882950 # Number of bytes written to this memory
|
|
system.physmem.bytes_written::total 89882950 # Number of bytes written to this memory
|
|
system.physmem.num_reads::cpu.inst 134553570 # Number of read requests responded to by this memory
|
|
system.physmem.num_reads::cpu.data 37231300 # Number of read requests responded to by this memory
|
|
system.physmem.num_reads::total 171784870 # Number of read requests responded to by this memory
|
|
system.physmem.num_writes::cpu.data 20864304 # Number of write requests responded to by this memory
|
|
system.physmem.num_writes::total 20864304 # Number of write requests responded to by this memory
|
|
system.physmem.num_other::cpu.data 15916 # Number of other requests responded to by this memory
|
|
system.physmem.num_other::total 15916 # Number of other requests responded to by this memory
|
|
system.physmem.bw_read::cpu.inst 7897648835 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_read::cpu.data 2165256573 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_read::total 10062905408 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_inst_read::cpu.inst 7897648835 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_inst_read::total 7897648835 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_write::cpu.data 1318924454 # Write bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_write::total 1318924454 # Write bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_total::cpu.inst 7897648835 # Total bandwidth to/from this memory (bytes/s)
|
|
system.physmem.bw_total::cpu.data 3484181027 # Total bandwidth to/from this memory (bytes/s)
|
|
system.physmem.bw_total::total 11381829862 # Total bandwidth to/from this memory (bytes/s)
|
|
system.membus.trans_dist::ReadReq 171784870 # Transaction distribution
|
|
system.membus.trans_dist::ReadResp 171784870 # Transaction distribution
|
|
system.membus.trans_dist::WriteReq 20864304 # Transaction distribution
|
|
system.membus.trans_dist::WriteResp 20864304 # Transaction distribution
|
|
system.membus.trans_dist::SwapReq 15916 # Transaction distribution
|
|
system.membus.trans_dist::SwapResp 15916 # Transaction distribution
|
|
system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 269107140 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 116223040 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_count::total 385330180 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 538214280 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 237569638 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.pkt_size::total 775783918 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.snoops 0 # Total snoops (count)
|
|
system.membus.snoop_fanout::samples 192665090 # Request fanout histogram
|
|
system.membus.snoop_fanout::mean 0.698381 # Request fanout histogram
|
|
system.membus.snoop_fanout::stdev 0.458961 # Request fanout histogram
|
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::0 58111520 30.16% 30.16% # Request fanout histogram
|
|
system.membus.snoop_fanout::1 134553570 69.84% 100.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
|
system.membus.snoop_fanout::max_value 1 # Request fanout histogram
|
|
system.membus.snoop_fanout::total 192665090 # Request fanout histogram
|
|
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
|
system.cpu.workload.num_syscalls 1946 # Number of system calls
|
|
system.cpu.numCycles 136297345 # number of cpu cycles simulated
|
|
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
|
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
|
system.cpu.committedInsts 134398962 # Number of instructions committed
|
|
system.cpu.committedOps 136139190 # Number of ops (including micro ops) committed
|
|
system.cpu.num_int_alu_accesses 115187746 # Number of integer alu accesses
|
|
system.cpu.num_fp_alu_accesses 2326977 # Number of float alu accesses
|
|
system.cpu.num_func_calls 1709332 # number of times a function call or return occured
|
|
system.cpu.num_conditional_control_insts 8898969 # number of instructions that are conditional controls
|
|
system.cpu.num_int_insts 115187746 # number of integer instructions
|
|
system.cpu.num_fp_insts 2326977 # number of float instructions
|
|
system.cpu.num_int_register_reads 263032361 # number of times the integer registers were read
|
|
system.cpu.num_int_register_writes 113147734 # number of times the integer registers were written
|
|
system.cpu.num_fp_register_reads 4725607 # number of times the floating registers were read
|
|
system.cpu.num_fp_register_writes 1150968 # number of times the floating registers were written
|
|
system.cpu.num_mem_refs 58160248 # number of memory refs
|
|
system.cpu.num_load_insts 37275867 # Number of load instructions
|
|
system.cpu.num_store_insts 20884381 # Number of store instructions
|
|
system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
|
|
system.cpu.num_busy_cycles 136297344.998000 # Number of busy cycles
|
|
system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
|
|
system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
|
|
system.cpu.Branches 12719095 # Number of branches fetched
|
|
system.cpu.op_class::No_OpClass 11445042 8.40% 8.40% # Class of executed instruction
|
|
system.cpu.op_class::IntAlu 66342070 48.68% 57.07% # Class of executed instruction
|
|
system.cpu.op_class::IntMult 0 0.00% 57.07% # Class of executed instruction
|
|
system.cpu.op_class::IntDiv 0 0.00% 57.07% # Class of executed instruction
|
|
system.cpu.op_class::FloatAdd 325584 0.24% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::FloatCmp 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::FloatCvt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::FloatMult 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::FloatDiv 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::FloatSqrt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdAdd 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdAddAcc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdAlu 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdCmp 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdCvt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdMisc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdMult 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdMultAcc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdShift 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdShiftAcc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdSqrt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAdd 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAlu 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCmp 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCvt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatDiv 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMisc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMult 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatSqrt 0 0.00% 57.31% # Class of executed instruction
|
|
system.cpu.op_class::MemRead 37296721 27.36% 84.68% # Class of executed instruction
|
|
system.cpu.op_class::MemWrite 20884381 15.32% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::total 136293798 # Class of executed instruction
|
|
|
|
---------- End Simulation Statistics ----------
|