gem5/src/arch/alpha/isa
Steve Reinhardt 95019d0c6f Merge vm1.(none):/home/stever/bk/newmem
into  vm1.(none):/home/stever/bk/newmem-py

src/python/m5/__init__.py:
src/sim/syscall_emul.cc:
    Hand merge.

--HG--
extra : convert_revision : e2542735323e648383c89382421d98a7d1d761bf
2006-06-09 23:18:46 -04:00
..
branch.isa Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. 2006-06-06 17:32:21 -04:00
decoder.isa Merge vm1.(none):/home/stever/bk/newmem 2006-06-09 23:18:46 -04:00
fp.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
int.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
main.isa Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. 2006-06-06 17:32:21 -04:00
mem.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
opcdec.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
pal.isa Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
unimp.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
unknown.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
util.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00