No description
Find a file
Steve Reinhardt 8406a54907 mem: fix bug in packet access endianness changes
The new Packet::setRaw() method incorrectly still contained
an htog() conversion.  As a result, calls to the old set()
method (now defined as setRaw(htog(v))) underwent two htog
conversions, which breaks things when htog() is not a no-op.

Interestingly the only test that caught this was a SPARC
boot test, where an IsaFake device with a non-zero return
value was getting swapped twice resulting in a register
getting loaded with 0x100000000000000 instead of 1.
(Good reason for keeping SPARC around, perhaps?)
2016-01-11 16:20:38 -05:00
build_opts scons: Do not build the InOrderCPU 2015-01-20 08:12:45 -05:00
configs configs: Fix inheritance of HMCSystem and cleanup spacing 2016-01-11 05:52:17 -05:00
ext scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00
src mem: fix bug in packet access endianness changes 2016-01-11 16:20:38 -05:00
system arm: Bootloader fix for v8 over 16 cores 2015-07-15 14:43:35 +01:00
tests stats: more updates due to PCI changes 2015-12-30 11:18:44 -05:00
util config: Updates for distributed gem5 simulations 2016-01-07 16:33:47 -06:00
.hgignore misc: ignore object files and static libs in util/m5 2015-11-13 17:03:48 -05:00
.hgtags Added tag stable_2015_09_03 for changeset 60eb3fef9c2d 2015-09-03 15:38:46 -05:00
COPYING copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
LICENSE copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
README misc: README direct to website for dependencies 2014-08-26 10:12:04 -04:00
SConstruct scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00

This is the gem5 simulator.

The main website can be found at http://www.gem5.org

A good starting point is http://www.gem5.org/Introduction, and for
more information about building the simulator and getting started
please see http://www.gem5.org/Documentation and
http://www.gem5.org/Tutorials.

To build gem5, you will need the following software: g++ or clang,
Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4,
and lastly protobuf if you want trace capture and playback
support. Please see http://www.gem5.org/Dependencies for more details
concerning the minimum versions of the aforementioned tools.

Once you have all dependencies resolved, type 'scons
build/<ARCH>/gem5.opt' where ARCH is one of ALPHA, ARM, NULL, MIPS,
POWER, SPARC, or X86. This will build an optimized version of the gem5
binary (gem5.opt) for the the specified architecture. See
http://www.gem5.org/Build_System for more details and options.

With the simulator built, have a look at
http://www.gem5.org/Running_gem5 for more information on how to use
gem5.

The basic source release includes these subdirectories:
   - configs: example simulation configuration scripts
   - ext: less-common external packages needed to build gem5
   - src: source code of the gem5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk
images. Please see the gem5 download page for these items at
http://www.gem5.org/Download

If you have questions, please send mail to gem5-users@gem5.org

Enjoy using gem5 and please share your modifications and extensions.