cf05fa476d
create an m5 package in python/m5
move the objects package into the m5 package
move the m5config into the m5 package as config
leave both importers outside of the package.
SConscript:
sim/main.cc:
move sim/pyconfig/* -> python
python/SConscript:
m5config.py -> m5/config.py (now automatically embedded)
objects -> python/m5/objects
embed all python files in python/m5
python/m5/config.py:
importer renamed mpy_importer
move code to m5/__init__.py
test/genini.py:
deal with new python organization
keep track of paths we want to add and add them after parameters
are parsed.
--HG--
rename : sim/pyconfig/SConscript => python/SConscript
rename : sim/pyconfig/m5config.py => python/m5/config.py
rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy
rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy
rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy
rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy
rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy
rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy
rename : objects/Bus.mpy => python/m5/objects/Bus.mpy
rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy
rename : objects/Device.mpy => python/m5/objects/Device.mpy
rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy
rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy
rename : objects/Ide.mpy => python/m5/objects/Ide.mpy
rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy
rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy
rename : objects/Pci.mpy => python/m5/objects/Pci.mpy
rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy
rename : objects/Platform.mpy => python/m5/objects/Platform.mpy
rename : objects/Process.mpy => python/m5/objects/Process.mpy
rename : objects/Repl.mpy => python/m5/objects/Repl.mpy
rename : objects/Root.mpy => python/m5/objects/Root.mpy
rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy
rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy
rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy
rename : objects/Uart.mpy => python/m5/objects/Uart.mpy
extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30
87 lines
3.2 KiB
Plaintext
87 lines
3.2 KiB
Plaintext
from Device import DmaDevice
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from Pci import PciDevice
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simobj EtherInt(SimObject):
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type = 'EtherInt'
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abstract = True
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peer = Param.EtherInt(NULL, "peer interface")
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simobj EtherLink(SimObject):
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type = 'EtherLink'
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int1 = Param.EtherInt("interface 1")
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int2 = Param.EtherInt("interface 2")
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delay = Param.Tick(0, "transmit delay of packets in us")
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speed = Param.Tick(100000000, "link speed in bits per second")
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dump = Param.EtherDump(NULL, "dump object")
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simobj EtherBus(SimObject):
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type = 'EtherBus'
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loopback = Param.Bool(True,
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"send packet back to the interface from which it came")
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dump = Param.EtherDump(NULL, "dump object")
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speed = Param.UInt64(100000000, "bus speed in bits per second")
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simobj EtherTap(EtherInt):
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type = 'EtherTap'
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bufsz = Param.Int(10000, "tap buffer size")
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dump = Param.EtherDump(NULL, "dump object")
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port = Param.UInt16(3500, "tap port")
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simobj EtherDump(SimObject):
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type = 'EtherDump'
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file = Param.String("dump file")
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simobj EtherDev(DmaDevice):
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type = 'EtherDev'
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hardware_address = Param.EthernetAddr(NextEthernetAddr,
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"Ethernet Hardware Address")
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dma_data_free = Param.Bool(False, "DMA of Data is free")
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dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
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dma_read_delay = Param.Tick(0, "fixed delay for dma reads")
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dma_read_factor = Param.Tick(0, "multiplier for dma reads")
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dma_write_delay = Param.Tick(0, "fixed delay for dma writes")
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dma_write_factor = Param.Tick(0, "multiplier for dma writes")
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rx_filter = Param.Bool(True, "Enable Receive Filter")
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rx_delay = Param.Tick(1000, "Receive Delay")
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tx_delay = Param.Tick(1000, "Transmit Delay")
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intr_delay = Param.Tick(0, "Interrupt Delay in microseconds")
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payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
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physmem = Param.PhysicalMemory(Super, "Physical Memory")
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tlaser = Param.Turbolaser(Super, "Turbolaser")
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simobj NSGigE(PciDevice):
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type = 'NSGigE'
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hardware_address = Param.EthernetAddr(NextEthernetAddr,
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"Ethernet Hardware Address")
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dma_data_free = Param.Bool(False, "DMA of Data is free")
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dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
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dma_read_delay = Param.Tick(0, "fixed delay for dma reads")
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dma_read_factor = Param.Tick(0, "multiplier for dma reads")
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dma_write_delay = Param.Tick(0, "fixed delay for dma writes")
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dma_write_factor = Param.Tick(0, "multiplier for dma writes")
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rx_filter = Param.Bool(True, "Enable Receive Filter")
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rx_delay = Param.Tick(1000, "Receive Delay")
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tx_delay = Param.Tick(1000, "Transmit Delay")
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rx_fifo_size = Param.Int(131072, "max size in bytes of rxFifo")
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tx_fifo_size = Param.Int(131072, "max size in bytes of txFifo")
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intr_delay = Param.Tick(0, "Interrupt Delay in microseconds")
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payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
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physmem = Param.PhysicalMemory(Super, "Physical Memory")
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simobj EtherDevInt(EtherInt):
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type = 'EtherDevInt'
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device = Param.EtherDev("Ethernet device of this interface")
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simobj NSGigEInt(EtherInt):
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type = 'NSGigEInt'
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device = Param.NSGigE("Ethernet device of this interface")
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