306 lines
10 KiB
C++
306 lines
10 KiB
C++
/*
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* Copyright (c) 2011-2012 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Ali Saidi
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* Andreas Hansson
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* William Wang
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*/
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/**
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* @file
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* Declaration of a coherent bus.
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*/
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#ifndef __MEM_COHERENT_BUS_HH__
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#define __MEM_COHERENT_BUS_HH__
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#include "mem/bus.hh"
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#include "params/CoherentBus.hh"
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/**
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* A coherent bus connects a number of (potentially) snooping masters
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* and slaves, and routes the request and response packets based on
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* the address, and also forwards all requests to the snoopers and
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* deals with the snoop responses.
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*
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* The coherent bus can be used as a template for modelling QPI,
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* HyperTransport, ACE and coherent OCP buses, and is typically used
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* for the L1-to-L2 buses and as the main system interconnect.
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* @sa \ref gem5MemorySystem "gem5 Memory System"
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*/
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class CoherentBus : public BaseBus
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{
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protected:
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/**
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* Declare the three layers of this bus, one for requests, one
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* for responses, and one for snoop responses
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*/
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Layer<SlavePort> reqLayer;
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Layer<MasterPort> respLayer;
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Layer<SlavePort> snoopRespLayer;
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/**
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* Declaration of the coherent bus slave port type, one will be
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* instantiated for each of the master ports connecting to the
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* bus.
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*/
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class CoherentBusSlavePort : public SlavePort
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{
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private:
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/** A reference to the bus to which this port belongs. */
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CoherentBus &bus;
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public:
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CoherentBusSlavePort(const std::string &_name,
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CoherentBus &_bus, PortID _id)
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: SlavePort(_name, &_bus, _id), bus(_bus)
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{ }
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protected:
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/**
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* When receiving a timing request, pass it to the bus.
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*/
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virtual bool recvTimingReq(PacketPtr pkt)
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{ return bus.recvTimingReq(pkt, id); }
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/**
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* When receiving a timing snoop response, pass it to the bus.
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*/
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virtual bool recvTimingSnoopResp(PacketPtr pkt)
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{ return bus.recvTimingSnoopResp(pkt, id); }
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/**
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* When receiving an atomic request, pass it to the bus.
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*/
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virtual Tick recvAtomic(PacketPtr pkt)
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{ return bus.recvAtomic(pkt, id); }
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/**
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* When receiving a functional request, pass it to the bus.
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*/
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virtual void recvFunctional(PacketPtr pkt)
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{ bus.recvFunctional(pkt, id); }
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/**
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* When receiving a retry, pass it to the bus.
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*/
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virtual void recvRetry()
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{ panic("Bus slave ports always succeed and should never retry.\n"); }
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/**
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* Return the union of all adress ranges seen by this bus.
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*/
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virtual AddrRangeList getAddrRanges() const
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{ return bus.getAddrRanges(); }
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/**
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* Get the maximum block size as seen by the bus.
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*/
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virtual unsigned deviceBlockSize() const
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{ return bus.findBlockSize(); }
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};
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/**
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* Declaration of the coherent bus master port type, one will be
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* instantiated for each of the slave interfaces connecting to the
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* bus.
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*/
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class CoherentBusMasterPort : public MasterPort
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{
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private:
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/** A reference to the bus to which this port belongs. */
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CoherentBus &bus;
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public:
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CoherentBusMasterPort(const std::string &_name,
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CoherentBus &_bus, PortID _id)
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: MasterPort(_name, &_bus, _id), bus(_bus)
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{ }
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protected:
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/**
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* Determine if this port should be considered a snooper. For
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* a coherent bus master port this is always true.
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*
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* @return a boolean that is true if this port is snooping
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*/
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virtual bool isSnooping() const
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{ return true; }
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/**
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* When receiving a timing response, pass it to the bus.
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*/
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virtual bool recvTimingResp(PacketPtr pkt)
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{ return bus.recvTimingResp(pkt, id); }
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/**
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* When receiving a timing snoop request, pass it to the bus.
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*/
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virtual void recvTimingSnoopReq(PacketPtr pkt)
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{ return bus.recvTimingSnoopReq(pkt, id); }
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/**
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* When receiving an atomic snoop request, pass it to the bus.
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*/
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virtual Tick recvAtomicSnoop(PacketPtr pkt)
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{ return bus.recvAtomicSnoop(pkt, id); }
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/**
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* When receiving a functional snoop request, pass it to the bus.
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*/
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virtual void recvFunctionalSnoop(PacketPtr pkt)
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{ bus.recvFunctionalSnoop(pkt, id); }
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/** When reciving a range change from the peer port (at id),
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pass it to the bus. */
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virtual void recvRangeChange()
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{ bus.recvRangeChange(id); }
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/** When reciving a retry from the peer port (at id),
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pass it to the bus. */
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virtual void recvRetry()
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{ bus.recvRetry(); }
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// Ask the bus to ask everyone on the bus what their block size is and
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// take the max of it. This might need to be changed a bit if we ever
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// support multiple block sizes.
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virtual unsigned deviceBlockSize() const
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{ return bus.findBlockSize(); }
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};
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std::vector<SlavePort*> snoopPorts;
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/**
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* Store the outstanding requests so we can determine which ones
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* we generated and which ones were merely forwarded. This is used
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* in the coherent bus when coherency responses come back.
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*/
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std::set<RequestPtr> outstandingReq;
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/** Function called by the port when the bus is recieving a Timing
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request packet.*/
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virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id);
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/** Function called by the port when the bus is recieving a Timing
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response packet.*/
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virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id);
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/** Function called by the port when the bus is recieving a timing
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snoop request.*/
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virtual void recvTimingSnoopReq(PacketPtr pkt, PortID master_port_id);
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/** Function called by the port when the bus is recieving a timing
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snoop response.*/
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virtual bool recvTimingSnoopResp(PacketPtr pkt, PortID slave_port_id);
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/** Timing function called by port when it is once again able to process
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* requests. */
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void recvRetry();
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/**
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* Forward a timing packet to our snoopers, potentially excluding
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* one of the connected coherent masters to avoid sending a packet
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* back to where it came from.
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*
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* @param pkt Packet to forward
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* @param exclude_slave_port_id Id of slave port to exclude
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*/
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void forwardTiming(PacketPtr pkt, PortID exclude_slave_port_id);
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/** Function called by the port when the bus is recieving a Atomic
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transaction.*/
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Tick recvAtomic(PacketPtr pkt, PortID slave_port_id);
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/** Function called by the port when the bus is recieving an
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atomic snoop transaction.*/
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Tick recvAtomicSnoop(PacketPtr pkt, PortID master_port_id);
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/**
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* Forward an atomic packet to our snoopers, potentially excluding
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* one of the connected coherent masters to avoid sending a packet
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* back to where it came from.
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*
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* @param pkt Packet to forward
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* @param exclude_slave_port_id Id of slave port to exclude
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*
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* @return a pair containing the snoop response and snoop latency
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*/
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std::pair<MemCmd, Tick> forwardAtomic(PacketPtr pkt,
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PortID exclude_slave_port_id);
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/** Function called by the port when the bus is recieving a Functional
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transaction.*/
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void recvFunctional(PacketPtr pkt, PortID slave_port_id);
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/** Function called by the port when the bus is recieving a functional
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snoop transaction.*/
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void recvFunctionalSnoop(PacketPtr pkt, PortID master_port_id);
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/**
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* Forward a functional packet to our snoopers, potentially
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* excluding one of the connected coherent masters to avoid
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* sending a packet back to where it came from.
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*
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* @param pkt Packet to forward
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* @param exclude_slave_port_id Id of slave port to exclude
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*/
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void forwardFunctional(PacketPtr pkt, PortID exclude_slave_port_id);
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public:
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virtual void init();
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CoherentBus(const CoherentBusParams *p);
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unsigned int drain(Event *de);
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};
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#endif //__MEM_COHERENT_BUS_HH__
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