gem5/src/mem/cache/tags/lru.hh
2012-09-25 11:49:41 -05:00

241 lines
6.9 KiB
C++

/*
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Erik Hallnor
*/
/**
* @file
* Declaration of a LRU tag store.
*/
#ifndef __MEM_CACHE_TAGS_LRU_HH__
#define __MEM_CACHE_TAGS_LRU_HH__
#include <cassert>
#include <cstring>
#include <list>
#include "mem/cache/tags/base.hh"
#include "mem/cache/blk.hh"
#include "mem/packet.hh"
class BaseCache;
class CacheSet;
/**
* A LRU cache tag store.
* @sa \ref gem5MemorySystem "gem5 Memory System"
*/
class LRU : public BaseTags
{
public:
/** Typedef the block type used in this tag store. */
typedef CacheBlk BlkType;
/** Typedef for a list of pointers to the local block class. */
typedef std::list<BlkType*> BlkList;
protected:
/** The number of sets in the cache. */
const unsigned numSets;
/** The number of bytes in a block. */
const unsigned blkSize;
/** The associativity of the cache. */
const unsigned assoc;
/** The hit latency. */
const unsigned hitLatency;
/** The cache sets. */
CacheSet *sets;
/** The cache blocks. */
BlkType *blks;
/** The data blocks, 1 per cache block. */
uint8_t *dataBlks;
/** The amount to shift the address to get the set. */
int setShift;
/** The amount to shift the address to get the tag. */
int tagShift;
/** Mask out all bits that aren't part of the set index. */
unsigned setMask;
/** Mask out all bits that aren't part of the block offset. */
unsigned blkMask;
public:
/**
* Construct and initialize this tag store.
* @param _numSets The number of sets in the cache.
* @param _blkSize The number of bytes in a block.
* @param _assoc The associativity of the cache.
* @param _hit_latency The latency in cycles for a hit.
*/
LRU(unsigned _numSets, unsigned _blkSize, unsigned _assoc,
unsigned _hit_latency);
/**
* Destructor
*/
virtual ~LRU();
/**
* Return the block size.
* @return the block size.
*/
unsigned
getBlockSize() const
{
return blkSize;
}
/**
* Return the subblock size. In the case of LRU it is always the block
* size.
* @return The block size.
*/
unsigned
getSubBlockSize() const
{
return blkSize;
}
/**
* Invalidate the given block.
* @param blk The block to invalidate.
*/
void invalidate(BlkType *blk);
/**
* Access block and update replacement data. May not succeed, in which case
* NULL pointer is returned. This has all the implications of a cache
* access and should only be used as such. Returns the access latency as a side effect.
* @param addr The address to find.
* @param asid The address space ID.
* @param lat The access latency.
* @return Pointer to the cache block if found.
*/
BlkType* accessBlock(Addr addr, int &lat, int context_src);
/**
* Finds the given address in the cache, do not update replacement data.
* i.e. This is a no-side-effect find of a block.
* @param addr The address to find.
* @param asid The address space ID.
* @return Pointer to the cache block if found.
*/
BlkType* findBlock(Addr addr) const;
/**
* Find a block to evict for the address provided.
* @param addr The addr to a find a replacement candidate for.
* @param writebacks List for any writebacks to be performed.
* @return The candidate block.
*/
BlkType* findVictim(Addr addr, PacketList &writebacks);
/**
* Insert the new block into the cache. For LRU this means inserting into
* the MRU position of the set.
* @param addr The address to update.
* @param blk The block to update.
*/
void insertBlock(Addr addr, BlkType *blk, int context_src);
/**
* Generate the tag from the given address.
* @param addr The address to get the tag from.
* @return The tag of the address.
*/
Addr extractTag(Addr addr) const
{
return (addr >> tagShift);
}
/**
* Calculate the set index from the address.
* @param addr The address to get the set from.
* @return The set index of the address.
*/
int extractSet(Addr addr) const
{
return ((addr >> setShift) & setMask);
}
/**
* Get the block offset from an address.
* @param addr The address to get the offset of.
* @return The block offset.
*/
int extractBlkOffset(Addr addr) const
{
return (addr & blkMask);
}
/**
* Align an address to the block size.
* @param addr the address to align.
* @return The block address.
*/
Addr blkAlign(Addr addr) const
{
return (addr & ~(Addr)blkMask);
}
/**
* Regenerate the block address from the tag.
* @param tag The tag of the block.
* @param set The set of the block.
* @return The block address.
*/
Addr regenerateBlkAddr(Addr tag, unsigned set) const
{
return ((tag << tagShift) | ((Addr)set << setShift));
}
/**
* Return the hit latency.
* @return the hit latency.
*/
int getHitLatency() const
{
return hitLatency;
}
/**
*iterated through all blocks and clear all locks
*Needed to clear all lock tracking at once
*/
virtual void clearLocks();
/**
* Called at end of simulation to complete average block reference stats.
*/
virtual void cleanupRefs();
};
#endif // __MEM_CACHE_TAGS_LRU_HH__