Korey Sewell 805b9cf1d5 Found and fixed 3 decoder.isa bugs!!! Now the hello_world program runs for a while ... before getting in a infinite loop. It actually "tries" to syscall too, but syscalls aren't implemented just yet arch/mips/faults.cc: more descriptive names for faults (will help future users as well as me!) arch/mips/isa/base.isa: make sure we are printing out "BasicOp" format disassembly instructions as dest,src,src instead of src,src,dest arch/mips/isa/decoder.isa: FIX LW/SW Bug!!!! I was actually loading a byte instead of a word FIX JALR Bug!!!! I was not saving the link address in R31 for this instruction FIX SLL/NOP Bug!!! We now recognize the varying flavors of sll,nop,ehb,& ssnop correctly base/loader/elf_object.cc: change back to original way base/loader/elf_object.hh: change back to original! --HG-- extra : convert_revision : 39b65fba31c1842ac6966346fe8a35816a4231fa		2006-03-16 18:39:54 -05:00
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alpha	add translations for new sections that are mmapped or when the brk	2006-03-15 17:04:50 -05:00
mips	Found and fixed 3 decoder.isa bugs!!! Now the hello_world program runs for a while	2006-03-16 18:39:54 -05:00
sparc	implement the Tcc instruction to call syscall.	2006-03-15 18:12:01 -05:00
isa_parser.py	Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.	2006-03-14 15:55:00 -05:00
isa_specific.hh	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
SConscript	Moved registerfile.hh to regfile.hh	2006-03-14 16:05:44 -05:00