gem5/src/arch/x86/isa/microops/ldstop.isa

// Copyright (c) 2007 The Hewlett-Packard Development Company
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// Authors: Gabe Black

//////////////////////////////////////////////////////////////////////////
//
// LdStOp Microop templates
//
//////////////////////////////////////////////////////////////////////////

// LEA template

def template MicroLeaExecute {{
    Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
          Trace::InstRecord *traceData) const
    {
        Fault fault = NoFault;
        Addr EA;

        %(op_decl)s;
        %(op_rd)s;
        %(ea_code)s;
        DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);

        %(code)s;
        if(fault == NoFault)
        {
            %(op_wb)s;
        }

        return fault;
    }
}};

def template MicroLeaDeclare {{
    class %(class_name)s : public %(base_class)s
    {
      protected:
        void buildMe();

      public:
        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(BasicExecDeclare)s
    };
}};

// Load templates

def template MicroLoadExecute {{
    Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
          Trace::InstRecord *traceData) const
    {
        Fault fault = NoFault;
        Addr EA;

        %(op_decl)s;
        %(op_rd)s;
        %(ea_code)s;
        DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);

        Twin64_t alignedMem;
        fault = read(xc, EA, alignedMem, 0);
        int offset = EA & (dataSize - 1);
        if(dataSize != 8 || !offset)
        {
            Mem = bits(alignedMem.a,
                    (offset + dataSize) * 8 - 1,  offset * 8);
        }
        else
        {
            Mem = alignedMem.b << (dataSize - offset) * 8;
            Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
        }

        if(fault == NoFault)
        {
            %(code)s;
        }
        if(fault == NoFault)
        {
            %(op_wb)s;
        }

        return fault;
    }
}};

def template MicroLoadInitiateAcc {{
    Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
            Trace::InstRecord * traceData) const
    {
        Fault fault = NoFault;
        Addr EA;

        %(op_decl)s;
        %(op_rd)s;
        %(ea_code)s;
        DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);

        int offset = EA & (dataSize - 1);
        Twin64_t alignedMem;
        fault = read(xc, EA, alignedMem, offset);

        return fault;
    }
}};

def template MicroLoadCompleteAcc {{
    Fault %(class_name)s::completeAcc(PacketPtr pkt,
            %(CPU_exec_context)s * xc,
            Trace::InstRecord * traceData) const
    {
        Fault fault = NoFault;

        %(op_decl)s;
        %(op_rd)s;

        Twin64_t alignedMem = pkt->get<Twin64_t>();
        int offset = pkt->req->getFlags();
        if(dataSize != 8 || !offset)
        {
            Mem = bits(alignedMem.a,
                    (offset + dataSize) * 8 - 1,  offset * 8);
        }
        else
        {
            Mem = alignedMem.b << (dataSize - offset) * 8;
            Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
        }
        %(code)s;

        if(fault == NoFault)
        {
            %(op_wb)s;
        }

        return fault;
    }
}};

// Store templates

def template MicroStoreExecute {{
    Fault %(class_name)s::execute(%(CPU_exec_context)s * xc,
            Trace::InstRecord *traceData) const
    {
        Fault fault = NoFault;

        Addr EA;
        %(op_decl)s;
        %(op_rd)s;
        %(ea_code)s;
        DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);

        %(code)s;

        if(fault == NoFault)
        {
            int offset = EA & (dataSize - 1);

            Twin64_t alignedMem;
            alignedMem.a = Mem << (offset * 8);
            alignedMem.b =
                bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);

            fault = write(xc, alignedMem, EA, 0);
            if(fault == NoFault)
            {
                %(op_wb)s;
            }
        }

        return fault;
    }
}};

def template MicroStoreInitiateAcc {{
    Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
            Trace::InstRecord * traceData) const
    {
        Fault fault = NoFault;

        Addr EA;
        %(op_decl)s;
        %(op_rd)s;
        %(ea_code)s;
        DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);

        %(code)s;

        if(fault == NoFault)
        {
            int offset = EA & (dataSize - 1);

            Twin64_t alignedMem;
            alignedMem.a = Mem << (offset * 8);
            alignedMem.b =
                bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);

            fault = write(xc, alignedMem, EA, 0);
            if(fault == NoFault)
            {
                %(op_wb)s;
            }
        }
        return fault;
    }
}};

def template MicroStoreCompleteAcc {{
    Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
            Trace::InstRecord * traceData) const
    {
        return NoFault;
    }
}};

// Common templates

//This delcares the initiateAcc function in memory operations
def template InitiateAccDeclare {{
    Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
}};

//This declares the completeAcc function in memory operations
def template CompleteAccDeclare {{
    Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
}};

def template MicroLdStOpDeclare {{
    class %(class_name)s : public %(base_class)s
    {
      protected:
        void buildMe();

      public:
        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(BasicExecDeclare)s

        %(InitiateAccDeclare)s

        %(CompleteAccDeclare)s
    };
}};

def template MicroLdStOpConstructor {{

    inline void %(class_name)s::buildMe()
    {
        %(constructor)s;
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            uint8_t _scale, RegIndex _index, RegIndex _base,
            uint64_t _disp, uint8_t _segment,
            RegIndex _data,
            uint8_t _dataSize, uint8_t _addressSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                false, false, false, false,
                _scale, _index, _base,
                _disp, _segment, _data,
                _dataSize, _addressSize, %(op_class)s)
    {
        buildMe();
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
            uint8_t _scale, RegIndex _index, RegIndex _base,
            uint64_t _disp, uint8_t _segment,
            RegIndex _data,
            uint8_t _dataSize, uint8_t _addressSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                isMicro, isDelayed, isFirst, isLast,
                _scale, _index, _base,
                _disp, _segment, _data,
                _dataSize, _addressSize, %(op_class)s)
    {
        buildMe();
    }
}};

let {{
    class LdStOp(X86Microop):
        def __init__(self, data, segment, addr, disp, dataSize):
            self.data = data
            [self.scale, self.index, self.base] = addr
            self.disp = disp
            self.segment = segment
            self.dataSize = dataSize
            self.addressSize = "env.addressSize"

        def getAllocator(self, *microFlags):
            allocator = '''new %(class_name)s(machInst, mnemonic
                    %(flags)s, %(scale)s, %(index)s, %(base)s,
                    %(disp)s, %(segment)s, %(data)s,
                    %(dataSize)s, %(addressSize)s)''' % {
                "class_name" : self.className,
                "flags" : self.microFlagsText(microFlags),
                "scale" : self.scale, "index" : self.index,
                "base" : self.base,
                "disp" : self.disp,
                "segment" : self.segment, "data" : self.data,
                "dataSize" : self.dataSize, "addressSize" : self.addressSize}
            return allocator
}};

let {{

    # Make these empty strings so that concatenating onto
    # them will always work.
    header_output = ""
    decoder_output = ""
    exec_output = ""

    calculateEA = "EA = SegBase + scale * Index + Base + disp;"

    def defineMicroLoadOp(mnemonic, code):
        global header_output
        global decoder_output
        global exec_output
        global microopClasses
        Name = mnemonic
        name = mnemonic.lower()

        # Build up the all register version of this micro op
        iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
                {"code": code, "ea_code": calculateEA})
        header_output += MicroLdStOpDeclare.subst(iop)
        decoder_output += MicroLdStOpConstructor.subst(iop)
        exec_output += MicroLoadExecute.subst(iop)
        exec_output += MicroLoadInitiateAcc.subst(iop)
        exec_output += MicroLoadCompleteAcc.subst(iop)

        class LoadOp(LdStOp):
            def __init__(self, data, segment, addr,
                    disp = 0, dataSize="env.dataSize"):
                super(LoadOp, self).__init__(data, segment,
                        addr, disp, dataSize)
                self.className = Name
                self.mnemonic = name

        microopClasses[name] = LoadOp

    defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);')

    def defineMicroStoreOp(mnemonic, code):
        global header_output
        global decoder_output
        global exec_output
        global microopClasses
        Name = mnemonic
        name = mnemonic.lower()

        # Build up the all register version of this micro op
        iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
                {"code": code, "ea_code": calculateEA})
        header_output += MicroLdStOpDeclare.subst(iop)
        decoder_output += MicroLdStOpConstructor.subst(iop)
        exec_output += MicroStoreExecute.subst(iop)
        exec_output += MicroStoreInitiateAcc.subst(iop)
        exec_output += MicroStoreCompleteAcc.subst(iop)

        class StoreOp(LdStOp):
            def __init__(self, data, segment, addr,
                    disp = 0, dataSize="env.dataSize"):
                super(StoreOp, self).__init__(data, segment,
                        addr, disp, dataSize)
                self.className = Name
                self.mnemonic = name

        microopClasses[name] = StoreOp

    defineMicroStoreOp('St', 'Mem = Data;')

    iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp',
            {"code": "Data = merge(Data, EA, dataSize);", "ea_code": calculateEA})
    header_output += MicroLeaDeclare.subst(iop)
    decoder_output += MicroLdStOpConstructor.subst(iop)
    exec_output += MicroLeaExecute.subst(iop)

    class LeaOp(LdStOp):
        def __init__(self, data, segment, addr,
                disp = 0, dataSize="env.dataSize"):
            super(LeaOp, self).__init__(data, segment,
                    addr, disp, dataSize)
            self.className = "Lea"
            self.mnemonic = "lea"

    microopClasses["lea"] = LeaOp
}};