208 lines
7.9 KiB
C++
208 lines
7.9 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2010 ARM Limited
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// All rights reserved
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//
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// The license below extends only to copyright in the software and shall
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// not be construed as granting a license to any other intellectual
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// property including but not limited to intellectual property relating
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// to a hardware implementation of the functionality of the software
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// licensed hereunder. You may use the software subject to the license
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// terms below provided that you ensure that this notice is replicated
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// unmodified and in its entirety in all distributions of the software,
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// modified or unmodified, in source code or in binary form.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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let {{
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header_output = ""
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decoder_output = ""
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exec_output = ""
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def storeImmClassName(post, add, writeback, \
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size=4, sign=False, user=False):
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return memClassName("STORE_IMM", post, add, writeback,
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size, sign, user)
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def storeRegClassName(post, add, writeback, \
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size=4, sign=False, user=False):
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return memClassName("STORE_REG", post, add, writeback,
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size, sign, user)
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def storeDoubleImmClassName(post, add, writeback):
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return memClassName("STORE_IMMD", post, add, writeback,
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4, False, False)
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def storeDoubleRegClassName(post, add, writeback):
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return memClassName("STORE_REGD", post, add, writeback,
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4, False, False)
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def emitStore(name, Name, imm, eaCode, accCode, memFlags, instFlags, base):
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global header_output, decoder_output, exec_output
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(newHeader,
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newDecoder,
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newExec) = loadStoreBase(name, Name, imm,
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eaCode, accCode,
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memFlags, instFlags,
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base, execTemplateBase = 'Store')
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header_output += newHeader
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decoder_output += newDecoder
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exec_output += newExec
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def buildImmStore(mnem, post, add, writeback, \
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size=4, sign=False, user=False):
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name = mnem
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Name = storeImmClassName(post, add, writeback, \
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size, sign, user)
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if add:
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op = " +"
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else:
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op = " -"
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offset = op + " imm"
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eaCode = "EA = Base"
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if not post:
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eaCode += offset
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eaCode += ";"
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accCode = "Mem%s = Dest;\n" % buildMemSuffix(sign, size)
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if writeback:
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accCode += "Base = Base %s;\n" % offset
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base = buildMemBase("MemoryImm", post, writeback)
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emitStore(name, Name, True, eaCode, accCode, [], [], base)
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def buildRegStore(mnem, post, add, writeback, \
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size=4, sign=False, user=False):
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name = mnem
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Name = storeRegClassName(post, add, writeback,
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size, sign, user)
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if add:
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op = " +"
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else:
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op = " -"
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offset = op + " shift_rm_imm(Index, shiftAmt," + \
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" shiftType, CondCodes<29:>)"
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eaCode = "EA = Base"
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if not post:
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eaCode += offset
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eaCode += ";"
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accCode = "Mem%s = Dest;\n" % buildMemSuffix(sign, size)
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if writeback:
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accCode += "Base = Base %s;\n" % offset
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base = buildMemBase("MemoryReg", post, writeback)
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emitStore(name, Name, False, eaCode, accCode, [], [], base)
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def buildDoubleImmStore(mnem, post, add, writeback):
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name = mnem
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Name = storeDoubleImmClassName(post, add, writeback)
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if add:
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op = " +"
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else:
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op = " -"
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offset = op + " imm"
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eaCode = "EA = Base"
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if not post:
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eaCode += offset
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eaCode += ";"
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accCode = 'Mem.ud = (Rdo.ud & mask(32)) | (Rde.ud << 32);'
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if writeback:
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accCode += "Base = Base %s;\n" % offset
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base = buildMemBase("MemoryImm", post, writeback)
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emitStore(name, Name, True, eaCode, accCode, [], [], base)
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def buildDoubleRegStore(mnem, post, add, writeback):
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name = mnem
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Name = storeDoubleRegClassName(post, add, writeback)
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if add:
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op = " +"
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else:
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op = " -"
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offset = op + " shift_rm_imm(Index, shiftAmt," + \
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" shiftType, CondCodes<29:>)"
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eaCode = "EA = Base"
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if not post:
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eaCode += offset
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eaCode += ";"
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accCode = 'Mem.ud = (Rdo.ud & mask(32)) | (Rde.ud << 32);'
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if writeback:
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accCode += "Base = Base %s;\n" % offset
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base = buildMemBase("MemoryReg", post, writeback)
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emitStore(name, Name, False, eaCode, accCode, [], [], base)
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def buildStores(mnem, size=4, sign=False, user=False):
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buildImmStore(mnem, True, True, True, size, sign, user)
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buildRegStore(mnem, True, True, True, size, sign, user)
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buildImmStore(mnem, True, False, True, size, sign, user)
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buildRegStore(mnem, True, False, True, size, sign, user)
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buildImmStore(mnem, False, True, True, size, sign, user)
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buildRegStore(mnem, False, True, True, size, sign, user)
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buildImmStore(mnem, False, False, True, size, sign, user)
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buildRegStore(mnem, False, False, True, size, sign, user)
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buildImmStore(mnem, False, True, False, size, sign, user)
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buildRegStore(mnem, False, True, False, size, sign, user)
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buildImmStore(mnem, False, False, False, size, sign, user)
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buildRegStore(mnem, False, False, False, size, sign, user)
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def buildDoubleStores(mnem):
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buildDoubleImmStore(mnem, True, True, True)
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buildDoubleRegStore(mnem, True, True, True)
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buildDoubleImmStore(mnem, True, False, True)
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buildDoubleRegStore(mnem, True, False, True)
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buildDoubleImmStore(mnem, False, True, True)
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buildDoubleRegStore(mnem, False, True, True)
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buildDoubleImmStore(mnem, False, False, True)
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buildDoubleRegStore(mnem, False, False, True)
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buildDoubleImmStore(mnem, False, True, False)
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buildDoubleRegStore(mnem, False, True, False)
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buildDoubleImmStore(mnem, False, False, False)
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buildDoubleRegStore(mnem, False, False, False)
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buildStores("str")
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buildStores("strt", user=True)
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buildStores("strb", size=1)
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buildStores("strbt", size=1, user=True)
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buildStores("strh", size=2)
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buildStores("strht", size=2, user=True)
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buildDoubleStores("strd")
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}};
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