a8b03e4d01
arch/alpha/isa/decoder.isa:
Make IPR accessing instructions serializing so they are not issued incorrectly in the O3 model.
arch/alpha/isa/pal.isa:
Allow IPR instructions to have flags.
base/traceflags.py:
Include new trace flags from the two new CPU models.
cpu/SConscript:
Create the templates for the split mem accessor methods. Also include the new files from the new models (the Ozone model will be checked in next).
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
Update to the BaseDynInst for the new models.
--HG--
extra : convert_revision : cc82db9c72ec3e29cea4c3fdff74a3843e287a35
93 lines
2.2 KiB
C++
93 lines
2.2 KiB
C++
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#ifndef __CPU_THREAD_STATE_HH__
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#define __CPU_THREAD_STATE_HH__
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#include "cpu/exec_context.hh"
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#if FULL_SYSTEM
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class EndQuiesceEvent;
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class FunctionProfile;
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class ProfileNode;
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#else
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class Process;
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class FunctionalMemory;
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#endif
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struct ThreadState {
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#if FULL_SYSTEM
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ThreadState(int _cpuId, int _tid, FunctionalMemory *_mem)
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: cpuId(_cpuId), tid(_tid), mem(_mem), lastActivate(0), lastSuspend(0),
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profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL)
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#else
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ThreadState(int _cpuId, int _tid, FunctionalMemory *_mem,
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Process *_process, short _asid)
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: cpuId(_cpuId), tid(_tid), mem(_mem), process(_process), asid(_asid)
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#endif
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{
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funcExeInst = 0;
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storeCondFailures = 0;
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}
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ExecContext::Status status;
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int cpuId;
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// Index of hardware thread context on the CPU that this represents.
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int tid;
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Counter numInst;
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Stats::Scalar<> numInsts;
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Stats::Scalar<> numMemRefs;
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// number of simulated loads
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Counter numLoad;
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Counter startNumLoad;
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FunctionalMemory *mem; // functional storage for process address space
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#if FULL_SYSTEM
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Tick lastActivate;
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Tick lastSuspend;
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FunctionProfile *profile;
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ProfileNode *profileNode;
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Addr profilePC;
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EndQuiesceEvent *quiesceEvent;
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#else
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Process *process;
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// Address space ID. Note that this is used for TIMING cache
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// simulation only; all functional memory accesses should use
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// one of the FunctionalMemory pointers above.
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short asid;
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#endif
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/**
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* Temporary storage to pass the source address from copy_load to
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* copy_store.
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* @todo Remove this temporary when we have a better way to do it.
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*/
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Addr copySrcAddr;
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/**
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* Temp storage for the physical source address of a copy.
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* @todo Remove this temporary when we have a better way to do it.
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*/
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Addr copySrcPhysAddr;
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/*
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* number of executed instructions, for matching with syscall trace
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* points in EIO files.
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*/
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Counter funcExeInst;
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//
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// Count failed store conditionals so we can warn of apparent
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// application deadlock situations.
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unsigned storeCondFailures;
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};
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#endif // __CPU_THREAD_STATE_HH__
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