ab9c20cc78
previous changesets took a closer look at memory mgmt in the inorder model and sought to avoid dynamic memory mgmt (for access to pipeline resources) as much as possible. For the regressions that were run, the sims are about 2x speedup from changeset 7726 which is the last change since the recent commits in Feb. (note: these regressions now are 4-issue CPUs instead of just 1-issue)
17 lines
634 B
Text
Executable file
17 lines
634 B
Text
Executable file
M5 Simulator System
|
|
|
|
Copyright (c) 2001-2008
|
|
The Regents of The University of Michigan
|
|
All Rights Reserved
|
|
|
|
|
|
M5 compiled Feb 18 2011 15:40:30
|
|
M5 revision Unknown
|
|
M5 started Feb 18 2011 18:52:59
|
|
M5 executing on m55-001.pool
|
|
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/inorder-timing -re tests/run.py build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/inorder-timing
|
|
Global frequency set at 1000000000000 ticks per second
|
|
info: Entering event queue @ 0. Starting simulation...
|
|
info: Increasing stack size by one page.
|
|
Hello world!
|
|
Exiting @ tick 22294500 because target called exit()
|