7d4f187700
This patch adds the necessary flags to the SConstruct and SConscript files for compiling using clang 2.9 and later (on Ubuntu et al and OSX XCode 4.2), and also cleans up a bunch of compiler warnings found by clang. Most of the warnings are related to hidden virtual functions, comparisons with unsigneds >= 0, and if-statements with empty bodies. A number of mismatches between struct and class are also fixed. clang 2.8 is not working as it has problems with class names that occur in multiple namespaces (e.g. Statistics in kernel_stats.hh). clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which causes confusion between the container std::set and the function Packet::set, and this is currently addressed by not including the entire namespace std, but rather selecting e.g. "using std::vector" in the appropriate places.
359 lines
12 KiB
C++
359 lines
12 KiB
C++
/*
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* Copyright (c) 2011 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2004-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Korey Sewell
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*/
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#ifndef __CPU_O3_LSQ_HH__
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#define __CPU_O3_LSQ_HH__
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#include <map>
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#include <queue>
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#include "config/full_system.hh"
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#include "cpu/o3/lsq_unit.hh"
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#include "cpu/inst_seq.hh"
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#include "mem/port.hh"
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#include "sim/sim_object.hh"
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struct DerivO3CPUParams;
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template <class Impl>
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class LSQ {
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public:
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typedef typename Impl::O3CPU O3CPU;
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typedef typename Impl::DynInstPtr DynInstPtr;
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typedef typename Impl::CPUPol::IEW IEW;
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typedef typename Impl::CPUPol::LSQUnit LSQUnit;
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/** SMT policy. */
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enum LSQPolicy {
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Dynamic,
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Partitioned,
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Threshold
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};
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/** Constructs an LSQ with the given parameters. */
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LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
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/** Returns the name of the LSQ. */
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std::string name() const;
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/** Registers statistics of each LSQ unit. */
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void regStats();
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/** Sets the pointer to the list of active threads. */
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void setActiveThreads(std::list<ThreadID> *at_ptr);
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/** Switches out the LSQ. */
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void switchOut();
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/** Takes over execution from another CPU's thread. */
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void takeOverFrom();
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/** Number of entries needed for the given amount of threads.*/
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int entryAmount(ThreadID num_threads);
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void removeEntries(ThreadID tid);
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/** Reset the max entries for each thread. */
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void resetEntries();
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/** Resize the max entries for a thread. */
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void resizeEntries(unsigned size, ThreadID tid);
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/** Ticks the LSQ. */
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void tick();
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/** Ticks a specific LSQ Unit. */
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void tick(ThreadID tid)
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{ thread[tid].tick(); }
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/** Inserts a load into the LSQ. */
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void insertLoad(DynInstPtr &load_inst);
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/** Inserts a store into the LSQ. */
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void insertStore(DynInstPtr &store_inst);
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/** Executes a load. */
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Fault executeLoad(DynInstPtr &inst);
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/** Executes a store. */
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Fault executeStore(DynInstPtr &inst);
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/**
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* Commits loads up until the given sequence number for a specific thread.
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*/
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void commitLoads(InstSeqNum &youngest_inst, ThreadID tid)
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{ thread[tid].commitLoads(youngest_inst); }
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/**
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* Commits stores up until the given sequence number for a specific thread.
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*/
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void commitStores(InstSeqNum &youngest_inst, ThreadID tid)
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{ thread[tid].commitStores(youngest_inst); }
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/**
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* Attempts to write back stores until all cache ports are used or the
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* interface becomes blocked.
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*/
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void writebackStores();
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/** Same as above, but only for one thread. */
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void writebackStores(ThreadID tid);
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/**
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* Squash instructions from a thread until the specified sequence number.
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*/
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void squash(const InstSeqNum &squashed_num, ThreadID tid)
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{ thread[tid].squash(squashed_num); }
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/** Returns whether or not there was a memory ordering violation. */
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bool violation();
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/**
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* Returns whether or not there was a memory ordering violation for a
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* specific thread.
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*/
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bool violation(ThreadID tid)
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{ return thread[tid].violation(); }
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/** Returns if a load is blocked due to the memory system for a specific
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* thread.
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*/
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bool loadBlocked(ThreadID tid)
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{ return thread[tid].loadBlocked(); }
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bool isLoadBlockedHandled(ThreadID tid)
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{ return thread[tid].isLoadBlockedHandled(); }
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void setLoadBlockedHandled(ThreadID tid)
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{ thread[tid].setLoadBlockedHandled(); }
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/** Gets the instruction that caused the memory ordering violation. */
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DynInstPtr getMemDepViolator(ThreadID tid)
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{ return thread[tid].getMemDepViolator(); }
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/** Returns the head index of the load queue for a specific thread. */
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int getLoadHead(ThreadID tid)
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{ return thread[tid].getLoadHead(); }
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/** Returns the sequence number of the head of the load queue. */
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InstSeqNum getLoadHeadSeqNum(ThreadID tid)
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{
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return thread[tid].getLoadHeadSeqNum();
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}
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/** Returns the head index of the store queue. */
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int getStoreHead(ThreadID tid)
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{ return thread[tid].getStoreHead(); }
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/** Returns the sequence number of the head of the store queue. */
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InstSeqNum getStoreHeadSeqNum(ThreadID tid)
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{
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return thread[tid].getStoreHeadSeqNum();
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}
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/** Returns the number of instructions in all of the queues. */
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int getCount();
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/** Returns the number of instructions in the queues of one thread. */
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int getCount(ThreadID tid)
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{ return thread[tid].getCount(); }
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/** Returns the total number of loads in the load queue. */
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int numLoads();
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/** Returns the total number of loads for a single thread. */
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int numLoads(ThreadID tid)
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{ return thread[tid].numLoads(); }
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/** Returns the total number of stores in the store queue. */
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int numStores();
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/** Returns the total number of stores for a single thread. */
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int numStores(ThreadID tid)
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{ return thread[tid].numStores(); }
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/** Returns the total number of loads that are ready. */
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int numLoadsReady();
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/** Returns the number of loads that are ready for a single thread. */
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int numLoadsReady(ThreadID tid)
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{ return thread[tid].numLoadsReady(); }
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/** Returns the number of free entries. */
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unsigned numFreeEntries();
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/** Returns the number of free entries for a specific thread. */
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unsigned numFreeEntries(ThreadID tid);
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/** Returns if the LSQ is full (either LQ or SQ is full). */
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bool isFull();
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/**
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* Returns if the LSQ is full for a specific thread (either LQ or SQ is
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* full).
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*/
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bool isFull(ThreadID tid);
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/** Returns if any of the LQs are full. */
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bool lqFull();
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/** Returns if the LQ of a given thread is full. */
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bool lqFull(ThreadID tid);
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/** Returns if any of the SQs are full. */
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bool sqFull();
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/** Returns if the SQ of a given thread is full. */
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bool sqFull(ThreadID tid);
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/**
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* Returns if the LSQ is stalled due to a memory operation that must be
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* replayed.
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*/
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bool isStalled();
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/**
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* Returns if the LSQ of a specific thread is stalled due to a memory
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* operation that must be replayed.
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*/
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bool isStalled(ThreadID tid);
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/** Returns whether or not there are any stores to write back to memory. */
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bool hasStoresToWB();
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/** Returns whether or not a specific thread has any stores to write back
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* to memory.
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*/
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bool hasStoresToWB(ThreadID tid)
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{ return thread[tid].hasStoresToWB(); }
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/** Returns the number of stores a specific thread has to write back. */
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int numStoresToWB(ThreadID tid)
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{ return thread[tid].numStoresToWB(); }
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/** Returns if the LSQ will write back to memory this cycle. */
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bool willWB();
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/** Returns if the LSQ of a specific thread will write back to memory this
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* cycle.
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*/
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bool willWB(ThreadID tid)
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{ return thread[tid].willWB(); }
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/** Returns if the cache is currently blocked. */
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bool cacheBlocked()
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{ return retryTid != InvalidThreadID; }
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/** Sets the retry thread id, indicating that one of the LSQUnits
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* tried to access the cache but the cache was blocked. */
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void setRetryTid(ThreadID tid)
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{ retryTid = tid; }
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/** Debugging function to print out all instructions. */
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void dumpInsts();
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/** Debugging function to print out instructions from a specific thread. */
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void dumpInsts(ThreadID tid)
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{ thread[tid].dumpInsts(); }
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/** Executes a read operation, using the load specified at the load
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* index.
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*/
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Fault read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
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uint8_t *data, int load_idx);
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/** Executes a store operation, using the store specified at the store
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* index.
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*/
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Fault write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
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uint8_t *data, int store_idx);
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/**
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* Retry the previous send that failed.
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*/
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void recvRetry();
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/**
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* Handles writing back and completing the load or store that has
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* returned from memory.
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*
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* @param pkt Response packet from the memory sub-system
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*/
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bool recvTiming(PacketPtr pkt);
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/** The CPU pointer. */
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O3CPU *cpu;
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/** The IEW stage pointer. */
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IEW *iewStage;
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protected:
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/** The LSQ policy for SMT mode. */
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LSQPolicy lsqPolicy;
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/** The LSQ units for individual threads. */
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LSQUnit thread[Impl::MaxThreads];
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/** List of Active Threads in System. */
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std::list<ThreadID> *activeThreads;
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/** Total Size of LQ Entries. */
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unsigned LQEntries;
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/** Total Size of SQ Entries. */
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unsigned SQEntries;
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/** Max LQ Size - Used to Enforce Sharing Policies. */
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unsigned maxLQEntries;
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/** Max SQ Size - Used to Enforce Sharing Policies. */
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unsigned maxSQEntries;
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/** Number of Threads. */
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ThreadID numThreads;
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/** The thread id of the LSQ Unit that is currently waiting for a
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* retry. */
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ThreadID retryTid;
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};
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template <class Impl>
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Fault
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LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
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uint8_t *data, int load_idx)
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{
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ThreadID tid = req->threadId();
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return thread[tid].read(req, sreqLow, sreqHigh, data, load_idx);
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}
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template <class Impl>
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Fault
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LSQ<Impl>::write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
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uint8_t *data, int store_idx)
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{
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ThreadID tid = req->threadId();
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return thread[tid].write(req, sreqLow, sreqHigh, data, store_idx);
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}
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#endif // __CPU_O3_LSQ_HH__
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