344 lines
11 KiB
C++
344 lines
11 KiB
C++
/*
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* Copyright (c) 2008 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2008 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/x86/bios/smbios.hh"
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#include "arch/x86/isa_traits.hh"
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#include "base/types.hh"
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#include "mem/port_proxy.hh"
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#include "params/X86SMBiosBiosInformation.hh"
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#include "params/X86SMBiosSMBiosStructure.hh"
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#include "params/X86SMBiosSMBiosTable.hh"
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#include "sim/byteswap.hh"
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using namespace std;
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const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
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const uint8_t X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::formattedArea[] = {0,0,0,0,0};
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const uint8_t X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::entryPointLength = 0x1F;
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const uint8_t X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::entryPointRevision = 0;
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const char X86ISA::SMBios::SMBiosTable::
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SMBiosHeader::IntermediateHeader::anchorString[] = "_DMI_";
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template <class T>
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uint64_t
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composeBitVector(T vec)
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{
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uint64_t val = 0;
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typename T::iterator vecIt;
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for (vecIt = vec.begin(); vecIt != vec.end(); vecIt++) {
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val |= (1 << (*vecIt));
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}
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return val;
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}
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uint16_t
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X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr)
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{
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proxy.writeBlob(addr, (uint8_t *)(&type), 1);
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uint8_t length = getLength();
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proxy.writeBlob(addr + 1, (uint8_t *)(&length), 1);
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uint16_t handleGuest = X86ISA::htog(handle);
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proxy.writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
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return length + getStringLength();
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}
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X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) :
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SimObject(p), type(_type), handle(0), stringFields(false)
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{}
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void
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X86ISA::SMBios::SMBiosStructure::writeOutStrings(
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PortProxy& proxy, Addr addr)
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{
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std::vector<std::string>::iterator it;
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Addr offset = 0;
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const uint8_t nullTerminator = 0;
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// If there are string fields but none of them are used, that's a
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// special case which is handled by this if.
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if (strings.size() == 0 && stringFields) {
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proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
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offset++;
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} else {
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for (it = strings.begin(); it != strings.end(); it++) {
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proxy.writeBlob(addr + offset,
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(uint8_t *)it->c_str(), it->length() + 1);
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offset += it->length() + 1;
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}
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}
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proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
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}
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int
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X86ISA::SMBios::SMBiosStructure::getStringLength()
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{
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int size = 0;
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std::vector<std::string>::iterator it;
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for (it = strings.begin(); it != strings.end(); it++) {
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size += it->length() + 1;
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}
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return size + 1;
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}
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int
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X86ISA::SMBios::SMBiosStructure::addString(string & newString)
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{
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stringFields = true;
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// If a string is empty, treat it as not existing. The index for empty
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// strings is 0.
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if (newString.length() == 0)
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return 0;
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strings.push_back(newString);
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return strings.size();
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}
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string
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X86ISA::SMBios::SMBiosStructure::readString(int n)
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{
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assert(n > 0 && n <= strings.size());
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return strings[n - 1];
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}
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void
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X86ISA::SMBios::SMBiosStructure::setString(int n, std::string & newString)
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{
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assert(n > 0 && n <= strings.size());
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strings[n - 1] = newString;
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}
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X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) :
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SMBiosStructure(p, Type),
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startingAddrSegment(p->starting_addr_segment),
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romSize(p->rom_size),
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majorVer(p->major), minorVer(p->minor),
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embContFirmwareMajor(p->emb_cont_firmware_major),
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embContFirmwareMinor(p->emb_cont_firmware_minor)
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{
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vendor = addString(p->vendor);
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version = addString(p->version);
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releaseDate = addString(p->release_date);
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characteristics = composeBitVector(p->characteristics);
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characteristicExtBytes =
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composeBitVector(p->characteristic_ext_bytes);
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}
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uint16_t
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X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr)
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{
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uint8_t size = SMBiosStructure::writeOut(proxy, addr);
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proxy.writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
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proxy.writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
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uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
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proxy.writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
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proxy.writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
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proxy.writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
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uint64_t characteristicsGuest = X86ISA::htog(characteristics);
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proxy.writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
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uint16_t characteristicExtBytesGuest =
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X86ISA::htog(characteristicExtBytes);
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proxy.writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
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proxy.writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
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proxy.writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
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proxy.writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
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proxy.writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
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writeOutStrings(proxy, addr + getLength());
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return size;
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}
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X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) :
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SimObject(p), structures(p->structures)
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{
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smbiosHeader.majorVersion = p->major_version;
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smbiosHeader.minorVersion = p->minor_version;
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assert(p->major_version <= 9);
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assert(p->minor_version <= 9);
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smbiosHeader.intermediateHeader.smbiosBCDRevision =
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(p->major_version << 4) | p->minor_version;
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}
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void
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X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr,
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Addr &headerSize, Addr &structSize)
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{
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headerSize = 0x1F;
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/*
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* The main header
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*/
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uint8_t mainChecksum = 0;
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proxy.writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
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for (int i = 0; i < 4; i++)
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mainChecksum += smbiosHeader.anchorString[i];
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// The checksum goes here, but we're figuring it out as we go.
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proxy.writeBlob(addr + 0x5,
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(uint8_t *)(&smbiosHeader.entryPointLength), 1);
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mainChecksum += smbiosHeader.entryPointLength;
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proxy.writeBlob(addr + 0x6,
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(uint8_t *)(&smbiosHeader.majorVersion), 1);
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mainChecksum += smbiosHeader.majorVersion;
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proxy.writeBlob(addr + 0x7,
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(uint8_t *)(&smbiosHeader.minorVersion), 1);
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mainChecksum += smbiosHeader.minorVersion;
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// Maximum structure size goes here, but we'll figure it out later.
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proxy.writeBlob(addr + 0xA,
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(uint8_t *)(&smbiosHeader.entryPointRevision), 1);
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mainChecksum += smbiosHeader.entryPointRevision;
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proxy.writeBlob(addr + 0xB,
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(uint8_t *)(&smbiosHeader.formattedArea), 5);
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for (int i = 0; i < 5; i++)
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mainChecksum += smbiosHeader.formattedArea[i];
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/*
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* The intermediate header
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*/
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uint8_t intChecksum = 0;
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proxy.writeBlob(addr + 0x10,
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(uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
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for (int i = 0; i < 5; i++)
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intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
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// The checksum goes here, but we're figuring it out as we go.
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// Then the length of the structure table which we'll find later
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uint32_t tableAddrGuest =
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X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
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proxy.writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
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for (int i = 0; i < 4; i++) {
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intChecksum += tableAddrGuest;
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tableAddrGuest >>= 8;
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}
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uint16_t numStructs = X86ISA::gtoh(structures.size());
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proxy.writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
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for (int i = 0; i < 2; i++) {
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intChecksum += numStructs;
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numStructs >>= 8;
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}
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proxy.writeBlob(addr + 0x1E,
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(uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
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1);
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intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
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/*
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* Structure table
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*/
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Addr base = smbiosHeader.intermediateHeader.tableAddr;
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Addr offset = 0;
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uint16_t maxSize = 0;
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std::vector<SMBiosStructure *>::iterator it;
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for (it = structures.begin(); it != structures.end(); it++) {
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uint16_t size = (*it)->writeOut(proxy, base + offset);
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if (size > maxSize)
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maxSize = size;
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offset += size;
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}
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structSize = offset;
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/*
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* Header
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*/
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maxSize = X86ISA::htog(maxSize);
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proxy.writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
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for (int i = 0; i < 2; i++) {
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mainChecksum += maxSize;
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maxSize >>= 8;
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}
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// Set the checksum
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mainChecksum = -mainChecksum;
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proxy.writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
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/*
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* Intermediate header
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*/
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uint16_t tableSize = offset;
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tableSize = X86ISA::htog(tableSize);
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proxy.writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
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for (int i = 0; i < 2; i++) {
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intChecksum += tableSize;
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tableSize >>= 8;
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}
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intChecksum = -intChecksum;
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proxy.writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
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}
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X86ISA::SMBios::BiosInformation *
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X86SMBiosBiosInformationParams::create()
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{
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return new X86ISA::SMBios::BiosInformation(this);
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}
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X86ISA::SMBios::SMBiosTable *
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X86SMBiosSMBiosTableParams::create()
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{
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return new X86ISA::SMBios::SMBiosTable(this);
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}
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