460 lines
14 KiB
C++
460 lines
14 KiB
C++
/*
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* Copyright (c) 2008 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/x86/bios/intelmp.hh"
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#include "arch/x86/isa_traits.hh"
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#include "base/misc.hh"
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#include "base/types.hh"
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#include "mem/port_proxy.hh"
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#include "sim/byteswap.hh"
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// Config entry types
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#include "params/X86IntelMPBaseConfigEntry.hh"
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#include "params/X86IntelMPExtConfigEntry.hh"
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// General table structures
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#include "params/X86IntelMPConfigTable.hh"
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#include "params/X86IntelMPFloatingPointer.hh"
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// Base entry types
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#include "params/X86IntelMPBus.hh"
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#include "params/X86IntelMPIOAPIC.hh"
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#include "params/X86IntelMPIOIntAssignment.hh"
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#include "params/X86IntelMPLocalIntAssignment.hh"
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#include "params/X86IntelMPProcessor.hh"
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// Extended entry types
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#include "params/X86IntelMPAddrSpaceMapping.hh"
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#include "params/X86IntelMPBusHierarchy.hh"
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#include "params/X86IntelMPCompatAddrSpaceMod.hh"
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using namespace std;
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const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_";
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template<class T>
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uint8_t
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writeOutField(PortProxy& proxy, Addr addr, T val)
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{
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uint64_t guestVal = X86ISA::htog(val);
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proxy.writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
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uint8_t checkSum = 0;
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while (guestVal) {
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checkSum += guestVal;
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guestVal >>= 8;
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}
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return checkSum;
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}
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uint8_t
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writeOutString(PortProxy& proxy, Addr addr, string str, int length)
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{
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char cleanedString[length + 1];
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cleanedString[length] = 0;
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if (str.length() > length) {
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memcpy(cleanedString, str.c_str(), length);
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warn("Intel MP configuration table string \"%s\" "
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"will be truncated to \"%s\".\n", str, (char *)&cleanedString);
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} else {
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memcpy(cleanedString, str.c_str(), str.length());
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memset(cleanedString + str.length(), 0, length - str.length());
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}
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proxy.writeBlob(addr, (uint8_t *)(&cleanedString), length);
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uint8_t checkSum = 0;
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for (int i = 0; i < length; i++)
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checkSum += cleanedString[i];
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return checkSum;
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}
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Addr
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X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy& proxy, Addr addr)
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{
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// Make sure that either a config table is present or a default
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// configuration was found but not both.
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if (!tableAddr && !defaultConfig)
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fatal("Either an MP configuration table or a default configuration "
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"must be used.");
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if (tableAddr && defaultConfig)
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fatal("Both an MP configuration table and a default configuration "
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"were set.");
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uint8_t checkSum = 0;
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proxy.writeBlob(addr, (uint8_t *)signature, 4);
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for (int i = 0; i < 4; i++)
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checkSum += signature[i];
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checkSum += writeOutField(proxy, addr + 4, tableAddr);
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// The length of the structure in paragraphs, aka 16 byte chunks.
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uint8_t length = 1;
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proxy.writeBlob(addr + 8, &length, 1);
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checkSum += length;
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proxy.writeBlob(addr + 9, &specRev, 1);
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checkSum += specRev;
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proxy.writeBlob(addr + 11, &defaultConfig, 1);
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checkSum += defaultConfig;
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uint32_t features2_5 = imcrPresent ? (1 << 7) : 0;
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checkSum += writeOutField(proxy, addr + 12, features2_5);
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checkSum = -checkSum;
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proxy.writeBlob(addr + 10, &checkSum, 1);
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return 16;
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}
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X86ISA::IntelMP::FloatingPointer::FloatingPointer(Params * p) :
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SimObject(p), tableAddr(0), specRev(p->spec_rev),
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defaultConfig(p->default_config), imcrPresent(p->imcr_present)
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{}
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X86ISA::IntelMP::FloatingPointer *
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X86IntelMPFloatingPointerParams::create()
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{
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return new X86ISA::IntelMP::FloatingPointer(this);
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}
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Addr
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X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy& proxy,
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Addr addr, uint8_t &checkSum)
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{
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proxy.writeBlob(addr, &type, 1);
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checkSum += type;
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return 1;
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}
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X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) :
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SimObject(p), type(_type)
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{}
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Addr
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X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy& proxy,
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Addr addr, uint8_t &checkSum)
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{
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proxy.writeBlob(addr, &type, 1);
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checkSum += type;
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proxy.writeBlob(addr + 1, &length, 1);
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checkSum += length;
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return 1;
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}
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X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p,
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uint8_t _type, uint8_t _length) :
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SimObject(p), type(_type), length(_length)
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{}
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const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP";
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Addr
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X86ISA::IntelMP::ConfigTable::writeOut(PortProxy& proxy, Addr addr)
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{
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uint8_t checkSum = 0;
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proxy.writeBlob(addr, (uint8_t *)signature, 4);
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for (int i = 0; i < 4; i++)
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checkSum += signature[i];
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// Base table length goes here but will be calculated later.
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proxy.writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
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checkSum += specRev;
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// The checksum goes here but is still being calculated.
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checkSum += writeOutString(proxy, addr + 8, oemID, 8);
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checkSum += writeOutString(proxy, addr + 16, productID, 12);
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checkSum += writeOutField(proxy, addr + 28, oemTableAddr);
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checkSum += writeOutField(proxy, addr + 32, oemTableSize);
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checkSum += writeOutField(proxy, addr + 34, (uint16_t)baseEntries.size());
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checkSum += writeOutField(proxy, addr + 36, localApic);
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uint8_t reserved = 0;
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proxy.writeBlob(addr + 43, &reserved, 1);
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checkSum += reserved;
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vector<BaseConfigEntry *>::iterator baseEnt;
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uint16_t offset = 44;
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for (baseEnt = baseEntries.begin();
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baseEnt != baseEntries.end(); baseEnt++) {
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offset += (*baseEnt)->writeOut(proxy, addr + offset, checkSum);
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}
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// We've found the end of the base table this point.
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checkSum += writeOutField(proxy, addr + 4, offset);
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vector<ExtConfigEntry *>::iterator extEnt;
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uint16_t extOffset = 0;
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uint8_t extCheckSum = 0;
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for (extEnt = extEntries.begin();
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extEnt != extEntries.end(); extEnt++) {
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extOffset += (*extEnt)->writeOut(proxy,
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addr + offset + extOffset, extCheckSum);
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}
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checkSum += writeOutField(proxy, addr + 40, extOffset);
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extCheckSum = -extCheckSum;
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checkSum += writeOutField(proxy, addr + 42, extCheckSum);
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// And now, we finally have the whole check sum completed.
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checkSum = -checkSum;
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writeOutField(proxy, addr + 7, checkSum);
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return offset + extOffset;
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};
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X86ISA::IntelMP::ConfigTable::ConfigTable(Params * p) : SimObject(p),
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specRev(p->spec_rev), oemID(p->oem_id), productID(p->product_id),
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oemTableAddr(p->oem_table_addr), oemTableSize(p->oem_table_size),
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localApic(p->local_apic),
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baseEntries(p->base_entries), extEntries(p->ext_entries)
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{}
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X86ISA::IntelMP::ConfigTable *
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X86IntelMPConfigTableParams::create()
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{
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return new X86ISA::IntelMP::ConfigTable(this);
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}
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Addr
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X86ISA::IntelMP::Processor::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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BaseConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 1, localApicID);
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checkSum += writeOutField(proxy, addr + 2, localApicVersion);
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checkSum += writeOutField(proxy, addr + 3, cpuFlags);
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checkSum += writeOutField(proxy, addr + 4, cpuSignature);
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checkSum += writeOutField(proxy, addr + 8, featureFlags);
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uint32_t reserved = 0;
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proxy.writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
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proxy.writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
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return 20;
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}
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X86ISA::IntelMP::Processor::Processor(Params * p) : BaseConfigEntry(p, 0),
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localApicID(p->local_apic_id), localApicVersion(p->local_apic_version),
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cpuFlags(0), cpuSignature(0), featureFlags(p->feature_flags)
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{
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if (p->enable)
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cpuFlags |= (1 << 0);
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if (p->bootstrap)
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cpuFlags |= (1 << 1);
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replaceBits(cpuSignature, 0, 3, p->stepping);
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replaceBits(cpuSignature, 4, 7, p->model);
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replaceBits(cpuSignature, 8, 11, p->family);
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}
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X86ISA::IntelMP::Processor *
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X86IntelMPProcessorParams::create()
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{
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return new X86ISA::IntelMP::Processor(this);
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}
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Addr
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X86ISA::IntelMP::Bus::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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BaseConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 1, busID);
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checkSum += writeOutString(proxy, addr + 2, busType, 6);
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return 8;
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}
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X86ISA::IntelMP::Bus::Bus(Params * p) : BaseConfigEntry(p, 1),
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busID(p->bus_id), busType(p->bus_type)
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{}
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X86ISA::IntelMP::Bus *
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X86IntelMPBusParams::create()
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{
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return new X86ISA::IntelMP::Bus(this);
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}
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Addr
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X86ISA::IntelMP::IOAPIC::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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BaseConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 1, id);
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checkSum += writeOutField(proxy, addr + 2, version);
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checkSum += writeOutField(proxy, addr + 3, flags);
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checkSum += writeOutField(proxy, addr + 4, address);
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return 8;
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}
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X86ISA::IntelMP::IOAPIC::IOAPIC(Params * p) : BaseConfigEntry(p, 2),
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id(p->id), version(p->version), flags(0), address(p->address)
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{
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if (p->enable)
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flags |= 1;
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}
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X86ISA::IntelMP::IOAPIC *
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X86IntelMPIOAPICParams::create()
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{
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return new X86ISA::IntelMP::IOAPIC(this);
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}
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Addr
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X86ISA::IntelMP::IntAssignment::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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BaseConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 1, interruptType);
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checkSum += writeOutField(proxy, addr + 2, flags);
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checkSum += writeOutField(proxy, addr + 4, sourceBusID);
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checkSum += writeOutField(proxy, addr + 5, sourceBusIRQ);
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checkSum += writeOutField(proxy, addr + 6, destApicID);
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checkSum += writeOutField(proxy, addr + 7, destApicIntIn);
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return 8;
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}
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X86ISA::IntelMP::IOIntAssignment::IOIntAssignment(Params * p) :
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IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 3,
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p->source_bus_id, p->source_bus_irq,
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p->dest_io_apic_id, p->dest_io_apic_intin)
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{}
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X86ISA::IntelMP::IOIntAssignment *
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X86IntelMPIOIntAssignmentParams::create()
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{
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return new X86ISA::IntelMP::IOIntAssignment(this);
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}
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X86ISA::IntelMP::LocalIntAssignment::LocalIntAssignment(Params * p) :
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IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 4,
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p->source_bus_id, p->source_bus_irq,
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p->dest_local_apic_id, p->dest_local_apic_intin)
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{}
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X86ISA::IntelMP::LocalIntAssignment *
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X86IntelMPLocalIntAssignmentParams::create()
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{
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return new X86ISA::IntelMP::LocalIntAssignment(this);
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}
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Addr
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X86ISA::IntelMP::AddrSpaceMapping::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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ExtConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 2, busID);
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checkSum += writeOutField(proxy, addr + 3, addrType);
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checkSum += writeOutField(proxy, addr + 4, addr);
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checkSum += writeOutField(proxy, addr + 12, addrLength);
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return length;
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}
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X86ISA::IntelMP::AddrSpaceMapping::AddrSpaceMapping(Params * p) :
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ExtConfigEntry(p, 128, 20),
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busID(p->bus_id), addrType(p->address_type),
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addr(p->address), addrLength(p->length)
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{}
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X86ISA::IntelMP::AddrSpaceMapping *
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X86IntelMPAddrSpaceMappingParams::create()
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{
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return new X86ISA::IntelMP::AddrSpaceMapping(this);
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}
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Addr
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X86ISA::IntelMP::BusHierarchy::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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ExtConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 2, busID);
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checkSum += writeOutField(proxy, addr + 3, info);
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checkSum += writeOutField(proxy, addr + 4, parentBus);
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uint32_t reserved = 0;
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proxy.writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
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return length;
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}
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X86ISA::IntelMP::BusHierarchy::BusHierarchy(Params * p) :
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ExtConfigEntry(p, 129, 8),
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busID(p->bus_id), info(0), parentBus(p->parent_bus)
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{
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if (p->subtractive_decode)
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info |= 1;
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}
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X86ISA::IntelMP::BusHierarchy *
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X86IntelMPBusHierarchyParams::create()
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{
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return new X86ISA::IntelMP::BusHierarchy(this);
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}
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Addr
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X86ISA::IntelMP::CompatAddrSpaceMod::writeOut(
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PortProxy& proxy, Addr addr, uint8_t &checkSum)
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{
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ExtConfigEntry::writeOut(proxy, addr, checkSum);
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checkSum += writeOutField(proxy, addr + 2, busID);
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checkSum += writeOutField(proxy, addr + 3, mod);
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checkSum += writeOutField(proxy, addr + 4, rangeList);
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return length;
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}
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X86ISA::IntelMP::CompatAddrSpaceMod::CompatAddrSpaceMod(Params * p) :
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ExtConfigEntry(p, 130, 8),
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busID(p->bus_id), mod(0), rangeList(p->range_list)
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{
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if (p->add)
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mod |= 1;
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}
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X86ISA::IntelMP::CompatAddrSpaceMod *
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X86IntelMPCompatAddrSpaceModParams::create()
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{
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return new X86ISA::IntelMP::CompatAddrSpaceMod(this);
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}
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