86 lines
2.7 KiB
C++
86 lines
2.7 KiB
C++
/*
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* Copyright (c) 2013 Andreas Sandberg
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Sandberg
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*/
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#include "arch/generic/mmapped_ipr.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/pseudo_inst.hh"
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using namespace GenericISA;
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static void
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handlePseudoInst(ThreadContext *xc, Packet *pkt)
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{
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const Addr offset(pkt->getAddr() & IPR_IN_CLASS_MASK);
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const uint8_t func((offset >> 8) & 0xFF);
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const uint8_t subfunc(offset & 0xFF);
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uint64_t ret;
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assert((offset >> 16) == 0);
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ret = PseudoInst::pseudoInst(xc, func, subfunc);
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if (pkt->isRead())
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pkt->set(ret);
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}
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Cycles
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GenericISA::handleGenericIprRead(ThreadContext *xc, Packet *pkt)
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{
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Addr va(pkt->getAddr());
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Addr cls(va >> IPR_CLASS_SHIFT);
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switch (cls) {
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case IPR_CLASS_PSEUDO_INST:
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handlePseudoInst(xc, pkt);
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break;
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default:
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panic("Unhandled generic IPR read: 0x%x\n", va);
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}
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return Cycles(1);
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}
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Cycles
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GenericISA::handleGenericIprWrite(ThreadContext *xc, Packet *pkt)
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{
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Addr va(pkt->getAddr());
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Addr cls(va >> IPR_CLASS_SHIFT);
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switch (cls) {
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case IPR_CLASS_PSEUDO_INST:
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handlePseudoInst(xc, pkt);
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break;
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default:
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panic("Unhandled generic IPR write: 0x%x\n", va);
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}
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return Cycles(1);
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}
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