gem5/arch/sparc/isa_desc/bitfields.h
Gabe Black 79a4683876 Adding the sparc ISA files which were worked on locally
arch/sparc/isa_desc/bitfields.h:
    This file defines the bit fields used by the isa description system
arch/sparc/isa_desc/decoder.h:
    This file describes the decoder for the isa description system
arch/sparc/isa_desc/formats.h:
    This file declares the instruction formats
arch/sparc/isa_desc/formats/basic.format:
    This file implements the "basic" instruction format
arch/sparc/isa_desc/formats/branch.format:
    This file implements the "branch" instruction format
arch/sparc/isa_desc/formats/integerop.format:
    This file implements the "integerop" instruction format
arch/sparc/isa_desc/formats/mem.format:
    This file implements the "mem" instruction format
arch/sparc/isa_desc/formats/noop.format:
    This file implements the "noop" instruction format
arch/sparc/isa_desc/formats/trap.format:
    This file implements the "trap" instruction format
arch/sparc/isa_desc/includes.h:
    This file is all of the inclues that are used by the isa description system

--HG--
extra : convert_revision : 12a2ffe949317b8b57d83263a4261131b9432c2a
2006-01-10 14:57:37 -05:00

51 lines
1.3 KiB
C

////////////////////////////////////////////////////////////////////
//
// Bitfield definitions.
//
// Bitfields are shared liberally between instruction formats, so they are
// simply defined alphabetically
def bitfield A <29>;
def bitfield CC02 <20>;
def bitfield CC03 <25>;
def bitfield CC04 <11>;
def bitfield CC12 <21>;
def bitfield CC13 <26>;
def bitfield CC14 <12>;
def bitfield CC2 <18>;
def bitfield CMASK <6:4>;
def bitfield COND2 <28:25>;
def bitfield COND4 <17:14>;
def bitfield D16HI <21:20>;
def bitfield D16LO <13:0>;
def bitfield DISP19 <18:0>;
def bitfield DISP22 <21:0>;
def bitfield DISP30 <29:0>;
def bitfield FCN <29:26>;
def bitfield I <13>;
def bitfield IMM_ASI <12:5>;
def bitfield IMM22 <21:0>;
def bitfield MMASK <3:0>;
def bitfield OP <31:30>;
def bitfield OP2 <24:22>;
def bitfield OP3 <24:19>;
def bitfield OPF <13:5>;
def bitfield OPF_CC <13:11>;
def bitfield OPF_LOW5 <9:5>;
def bitfield OPF_LOW6 <10:5>;
def bitfield P <19>;
def bitfield RCOND2 <27:25>;
def bitfield RCOND3 <12:10>;
def bitfield RCOND4 <12:10>;
def bitfield RD <29:25>;
def bitfield RS1 <18:14>;
def bitfield RS2 <4:0>;
def bitfield SHCNT32 <4:0>;
def bitfield SHCNT64 <5:0>;
def bitfield SIMM10 <9:0>;
def bitfield SIMM11 <10:0>;
def bitfield SIMM13 <12:0>;
def bitfield SW_TRAP <6:0>;
def bitfield X <12>;