1795 lines
No EOL
66 KiB
JSON
1795 lines
No EOL
66 KiB
JSON
{
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"name": null,
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"sim_quantum": 0,
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"system": {
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"have_virtualization": false,
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"mmap_using_noreserve": false,
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"kernel_addr_check": true,
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"highest_el_is_64": false,
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"kernel": "/work/gem5/dist/binaries/vmlinux.aarch64.20140821",
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"iobus": {
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"slave": {
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"peer": [
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"system.bridge.master",
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"system.realview.clcd.dma",
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"system.realview.cf_ctrl.dma",
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"system.realview.ide.dma",
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"system.realview.ethernet.dma"
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],
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"role": "SLAVE"
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},
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"name": "iobus",
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"default": {
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"peer": "system.realview.pciconfig.pio",
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"role": "MASTER"
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},
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"system.realview.uart.pio",
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"system.realview.realview_io.pio",
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"system.realview.timer0.pio",
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"system.realview.timer1.pio",
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"system.realview.clcd.pio",
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"system.realview.hdlcd.pio",
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"system.realview.kmi0.pio",
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"system.realview.kmi1.pio",
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"system.realview.cf_ctrl.pio",
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"system.realview.cf_ctrl.config",
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"system.realview.rtc.pio",
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"system.realview.vram.port",
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"system.realview.l2x0_fake.pio",
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"system.realview.uart1_fake.pio",
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"system.realview.uart2_fake.pio",
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"system.realview.uart3_fake.pio",
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"system.realview.sp810_fake.pio",
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"system.realview.watchdog_fake.pio",
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"system.realview.aaci_fake.pio",
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"system.realview.lan_fake.pio",
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"system.realview.usb_fake.pio",
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"system.realview.mmc_fake.pio",
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"system.realview.energy_ctrl.pio",
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"system.realview.ide.pio",
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"system.realview.ide.config",
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"system.realview.ethernet.pio",
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"system.realview.ethernet.config",
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"system.iocache.cpu_side"
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],
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"role": "MASTER"
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},
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"path": "system.iobus",
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},
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"symbolfile": "",
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"path": "system.vncserver",
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},
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"name": "clk_domain",
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"clock": [
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1000
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],
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"path": "system.clk_domain",
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"domain_id": -1
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},
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"mem_ranges": [
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"2147483648:2415919103"
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],
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"realview": {
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"hdlcd": {
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"vnc": "system.vncserver",
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"name": "hdlcd",
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"role": "SLAVE"
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},
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"pixel_buffer_size": 2048,
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"cxx_class": "HDLcd",
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"type": "HDLcd",
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"dma": {
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"peer": "system.membus.slave[0]",
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"role": "MASTER"
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}
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},
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"mmc_fake": {
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"name": "mmc_fake",
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"pio": {
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"peer": "system.iobus.master[21]",
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"role": "SLAVE"
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},
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"system": "system",
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"cxx_class": "AmbaFake",
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"path": "system.realview.mmc_fake",
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"type": "AmbaFake"
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},
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"rtc": {
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"name": "rtc",
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"int_delay": 100000,
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"pio": {
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"peer": "system.iobus.master[10]",
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"role": "SLAVE"
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},
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"amba_id": 3412017,
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"time": "Thu Jan 1 00:00:00 2009",
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"system": "system",
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"cxx_class": "PL031",
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"path": "system.realview.rtc",
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"type": "PL031"
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},
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"vgic": {
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"system": "system",
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"name": "vgic",
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"pio": {
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"peer": "system.membus.master[3]",
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"role": "SLAVE"
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},
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"clk_domain": "system.clk_domain",
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"gic": "system.realview.gic",
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"platform": "system.realview",
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"path": "system.realview.vgic",
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"type": "VGic",
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"pio_delay": 10000
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},
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"cxx_class": "RealView",
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"uart3_fake": {
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"name": "uart3_fake",
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"pio": {
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"peer": "system.iobus.master[15]",
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"role": "SLAVE"
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},
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"system": "system",
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"cxx_class": "AmbaFake",
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"path": "system.realview.uart3_fake",
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"type": "AmbaFake"
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},
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"name": "realview_io",
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"pio": {
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"peer": "system.iobus.master[1]",
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"role": "SLAVE"
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},
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"system": "system",
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"path": "system.realview.realview_io",
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"idreg": 35979264,
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"type": "RealViewCtrl",
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"pio_addr": 469827584
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},
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"l2x0_fake": {
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"system": "system",
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"name": "l2x0_fake",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[12]",
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"role": "SLAVE"
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},
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"cxx_class": "IsaFake",
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"path": "system.realview.l2x0_fake",
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"pio_addr": 739246080,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"uart1_fake": {
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"name": "uart1_fake",
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"pio": {
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"peer": "system.iobus.master[13]",
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"role": "SLAVE"
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},
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"system": "system",
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"path": "system.realview.uart1_fake",
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"pio_addr": 470417408,
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"type": "AmbaFake"
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},
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"usb_fake": {
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"system": "system",
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"ret_data8": 255,
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"name": "usb_fake",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[20]",
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"role": "SLAVE"
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},
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|
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|
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|
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"cxx_class": "IsaFake",
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"path": "system.realview.usb_fake",
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"type": "IsaFake",
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"ret_data16": 65535
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|
},
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|
"system": "system",
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"local_cpu_timer": {
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|
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"name": "local_cpu_timer",
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"pio": {
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|
"peer": "system.membus.master[4]",
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"role": "SLAVE"
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|
},
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"system": "system",
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"gic": "system.realview.gic",
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"path": "system.realview.local_cpu_timer",
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|
"type": "CpuLocalTimer"
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},
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"name": "generic_timer",
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"path": "system.realview.generic_timer",
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|
"type": "GenericTimer"
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},
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"gic": {
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"name": "gic",
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|
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|
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"system": "system",
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|
"platform": "system.realview",
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"cxx_class": "Pl390",
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|
"pio": {
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"peer": "system.membus.master[2]",
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"role": "SLAVE"
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|
},
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"path": "system.realview.gic",
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|
"type": "Pl390"
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|
},
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|
"timer1": {
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|
"name": "timer1",
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|
"pio": {
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|
"peer": "system.iobus.master[3]",
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|
"role": "SLAVE"
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|
},
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|
"amba_id": 1316868,
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|
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|
"system": "system",
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|
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|
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|
"gic": "system.realview.gic",
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|
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"cxx_class": "Sp804",
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"path": "system.realview.timer1",
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"int_num0": 35,
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"int_num1": 35,
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"type": "Sp804",
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"pio_addr": 470941696
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|
},
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|
"timer0": {
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"name": "timer0",
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"pio": {
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"peer": "system.iobus.master[2]",
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"role": "SLAVE"
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|
},
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|
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|
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|
"system": "system",
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|
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|
"gic": "system.realview.gic",
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|
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|
"cxx_class": "Sp804",
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|
"path": "system.realview.timer0",
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|
"int_num0": 34,
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|
"int_num1": 34,
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|
"type": "Sp804",
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|
"pio_addr": 470876160
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|
},
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|
"uart2_fake": {
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|
"name": "uart2_fake",
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|
"pio": {
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|
"peer": "system.iobus.master[14]",
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|
"role": "SLAVE"
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|
},
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|
"amba_id": 0,
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|
"ignore_access": false,
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|
"pio_latency": 100000,
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|
"clk_domain": "system.clk_domain",
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|
"system": "system",
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|
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"cxx_class": "AmbaFake",
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|
"path": "system.realview.uart2_fake",
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|
"pio_addr": 470482944,
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|
"type": "AmbaFake"
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|
},
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|
"eventq_index": 0,
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|
"energy_ctrl": {
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|
"name": "energy_ctrl",
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|
"pio": {
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|
"peer": "system.iobus.master[22]",
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|
"role": "SLAVE"
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|
},
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|
"pio_latency": 100000,
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|
"clk_domain": "system.clk_domain",
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|
"system": "system",
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|
"eventq_index": 0,
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|
"cxx_class": "EnergyCtrl",
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|
"path": "system.realview.energy_ctrl",
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|
"dvfs_handler": "system.dvfs_handler",
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|
"type": "EnergyCtrl",
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|
"pio_addr": 470286336
|
|
},
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|
"type": "RealView",
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|
"lan_fake": {
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|
"system": "system",
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|
"ret_data8": 255,
|
|
"name": "lan_fake",
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|
"warn_access": "",
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|
"pio": {
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|
"peer": "system.iobus.master[19]",
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|
"role": "SLAVE"
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|
},
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|
"ret_bad_addr": false,
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|
"pio_latency": 100000,
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|
"clk_domain": "system.clk_domain",
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|
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|
"pio_size": 65535,
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|
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|
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|
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|
"cxx_class": "IsaFake",
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|
"path": "system.realview.lan_fake",
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|
"pio_addr": 436207616,
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|
"type": "IsaFake",
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|
"ret_data16": 65535
|
|
},
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|
"aaci_fake": {
|
|
"name": "aaci_fake",
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|
"pio": {
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|
"peer": "system.iobus.master[18]",
|
|
"role": "SLAVE"
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|
},
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|
"amba_id": 0,
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|
"ignore_access": false,
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|
"pio_latency": 100000,
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|
"clk_domain": "system.clk_domain",
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|
"system": "system",
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|
"eventq_index": 0,
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|
"cxx_class": "AmbaFake",
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|
"path": "system.realview.aaci_fake",
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|
"pio_addr": 470024192,
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|
"type": "AmbaFake"
|
|
},
|
|
"mcc": {
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|
"osc_peripheral": {
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|
"position": 0,
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|
"name": "osc_peripheral",
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|
"parent": "system.realview.realview_io",
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|
"voltage_domain": "system.voltage_domain",
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|
"dcc": 0,
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|
"site": 0,
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|
"eventq_index": 0,
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|
"cxx_class": "RealViewOsc",
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|
"device": 2,
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|
"path": "system.realview.mcc.osc_peripheral",
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|
"freq": 41667,
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|
"type": "RealViewOsc"
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|
},
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|
"name": "mcc",
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|
"osc_mcc": {
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|
"position": 0,
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|
"name": "osc_mcc",
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|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 0,
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|
"eventq_index": 0,
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|
"cxx_class": "RealViewOsc",
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|
"device": 0,
|
|
"path": "system.realview.mcc.osc_mcc",
|
|
"freq": 20000,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"type": "SubSystem",
|
|
"eventq_index": 0,
|
|
"cxx_class": "SubSystem",
|
|
"path": "system.realview.mcc",
|
|
"osc_clcd": {
|
|
"position": 0,
|
|
"name": "osc_clcd",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 0,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 1,
|
|
"path": "system.realview.mcc.osc_clcd",
|
|
"freq": 42105,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"osc_system_bus": {
|
|
"position": 0,
|
|
"name": "osc_system_bus",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 0,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 4,
|
|
"path": "system.realview.mcc.osc_system_bus",
|
|
"freq": 41667,
|
|
"type": "RealViewOsc"
|
|
}
|
|
},
|
|
"dcc": {
|
|
"name": "dcc",
|
|
"osc_hsbm": {
|
|
"position": 0,
|
|
"name": "osc_hsbm",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 4,
|
|
"path": "system.realview.dcc.osc_hsbm",
|
|
"freq": 25000,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"osc_sys": {
|
|
"position": 0,
|
|
"name": "osc_sys",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 7,
|
|
"path": "system.realview.dcc.osc_sys",
|
|
"freq": 16667,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"osc_ddr": {
|
|
"position": 0,
|
|
"name": "osc_ddr",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 8,
|
|
"path": "system.realview.dcc.osc_ddr",
|
|
"freq": 25000,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"eventq_index": 0,
|
|
"osc_cpu": {
|
|
"position": 0,
|
|
"name": "osc_cpu",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 0,
|
|
"path": "system.realview.dcc.osc_cpu",
|
|
"freq": 16667,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"cxx_class": "SubSystem",
|
|
"path": "system.realview.dcc",
|
|
"osc_smb": {
|
|
"position": 0,
|
|
"name": "osc_smb",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 6,
|
|
"path": "system.realview.dcc.osc_smb",
|
|
"freq": 20000,
|
|
"type": "RealViewOsc"
|
|
},
|
|
"type": "SubSystem",
|
|
"osc_pxl": {
|
|
"position": 0,
|
|
"name": "osc_pxl",
|
|
"parent": "system.realview.realview_io",
|
|
"voltage_domain": "system.voltage_domain",
|
|
"dcc": 0,
|
|
"site": 1,
|
|
"eventq_index": 0,
|
|
"cxx_class": "RealViewOsc",
|
|
"device": 5,
|
|
"path": "system.realview.dcc.osc_pxl",
|
|
"freq": 42105,
|
|
"type": "RealViewOsc"
|
|
}
|
|
},
|
|
"pciconfig": {
|
|
"name": "pciconfig",
|
|
"pio": {
|
|
"peer": "system.iobus.default",
|
|
"role": "SLAVE"
|
|
},
|
|
"bus": 0,
|
|
"pio_latency": 30000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"platform": "system.realview",
|
|
"eventq_index": 0,
|
|
"cxx_class": "PciConfigAll",
|
|
"path": "system.realview.pciconfig",
|
|
"pio_addr": 0,
|
|
"type": "PciConfigAll",
|
|
"size": 268435456
|
|
},
|
|
"pci_cfg_base": 805306368,
|
|
"path": "system.realview",
|
|
"vram": {
|
|
"range": "402653184:436207615",
|
|
"latency": 30000,
|
|
"name": "vram",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "73.000000",
|
|
"conf_table_reported": false,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.realview.vram",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.iobus.master[11]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
"pci_io_base": 788529152,
|
|
"nvmem": {
|
|
"range": "0:67108863",
|
|
"latency": 30000,
|
|
"name": "nvmem",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "73.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.realview.nvmem",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[1]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
"clcd": {
|
|
"dma": {
|
|
"peer": "system.iobus.slave[1]",
|
|
"role": "MASTER"
|
|
},
|
|
"pixel_clock": 41667,
|
|
"vnc": "system.vncserver",
|
|
"name": "clcd",
|
|
"pio": {
|
|
"peer": "system.iobus.master[4]",
|
|
"role": "SLAVE"
|
|
},
|
|
"amba_id": 1315089,
|
|
"pio_latency": 10000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"gic": "system.realview.gic",
|
|
"int_num": 46,
|
|
"eventq_index": 0,
|
|
"cxx_class": "Pl111",
|
|
"enable_capture": true,
|
|
"path": "system.realview.clcd",
|
|
"pio_addr": 471793664,
|
|
"type": "Pl111"
|
|
},
|
|
"name": "realview",
|
|
"uart": {
|
|
"terminal": "system.terminal",
|
|
"name": "uart",
|
|
"int_delay": 100000,
|
|
"platform": "system.realview",
|
|
"pio": {
|
|
"peer": "system.iobus.master[0]",
|
|
"role": "SLAVE"
|
|
},
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"gic": "system.realview.gic",
|
|
"int_num": 37,
|
|
"eventq_index": 0,
|
|
"end_on_eot": false,
|
|
"cxx_class": "Pl011",
|
|
"path": "system.realview.uart",
|
|
"pio_addr": 470351872,
|
|
"type": "Pl011"
|
|
},
|
|
"watchdog_fake": {
|
|
"name": "watchdog_fake",
|
|
"pio": {
|
|
"peer": "system.iobus.master[17]",
|
|
"role": "SLAVE"
|
|
},
|
|
"amba_id": 0,
|
|
"ignore_access": false,
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "AmbaFake",
|
|
"path": "system.realview.watchdog_fake",
|
|
"pio_addr": 470745088,
|
|
"type": "AmbaFake"
|
|
},
|
|
"intrctrl": "system.intrctrl",
|
|
"kmi1": {
|
|
"vnc": "system.vncserver",
|
|
"name": "kmi1",
|
|
"int_delay": 1000000,
|
|
"pio": {
|
|
"peer": "system.iobus.master[7]",
|
|
"role": "SLAVE"
|
|
},
|
|
"amba_id": 1314896,
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"gic": "system.realview.gic",
|
|
"int_num": 45,
|
|
"eventq_index": 0,
|
|
"is_mouse": true,
|
|
"cxx_class": "Pl050",
|
|
"path": "system.realview.kmi1",
|
|
"pio_addr": 470220800,
|
|
"type": "Pl050"
|
|
},
|
|
"kmi0": {
|
|
"vnc": "system.vncserver",
|
|
"name": "kmi0",
|
|
"int_delay": 1000000,
|
|
"pio": {
|
|
"peer": "system.iobus.master[6]",
|
|
"role": "SLAVE"
|
|
},
|
|
"amba_id": 1314896,
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"gic": "system.realview.gic",
|
|
"int_num": 44,
|
|
"eventq_index": 0,
|
|
"is_mouse": false,
|
|
"cxx_class": "Pl050",
|
|
"path": "system.realview.kmi0",
|
|
"pio_addr": 470155264,
|
|
"type": "Pl050"
|
|
},
|
|
"cf_ctrl": {
|
|
"PMCAPNextCapability": 0,
|
|
"InterruptPin": 1,
|
|
"HeaderType": 0,
|
|
"VendorID": 32902,
|
|
"MSIXMsgCtrl": 0,
|
|
"MSIXCAPNextCapability": 0,
|
|
"PXCAPLinkCtrl": 0,
|
|
"Revision": 0,
|
|
"LegacyIOBase": 0,
|
|
"pio_latency": 30000,
|
|
"platform": "system.realview",
|
|
"PXCAPLinkCap": 0,
|
|
"CapabilityPtr": 0,
|
|
"MSIXCAPBaseOffset": 0,
|
|
"PXCAPDevCapabilities": 0,
|
|
"MSIXCAPCapId": 0,
|
|
"BAR3Size": 4,
|
|
"PXCAPCapabilities": 0,
|
|
"SubsystemID": 0,
|
|
"PXCAPCapId": 0,
|
|
"BAR4": 1,
|
|
"BAR1": 471466240,
|
|
"BAR0": 471465984,
|
|
"BAR3": 1,
|
|
"BAR2": 1,
|
|
"BAR5": 1,
|
|
"PXCAPDevStatus": 0,
|
|
"disks": [],
|
|
"BAR2Size": 8,
|
|
"MSICAPNextCapability": 0,
|
|
"ExpansionROM": 0,
|
|
"MSICAPMsgCtrl": 0,
|
|
"BAR5Size": 0,
|
|
"CardbusCIS": 0,
|
|
"MSIXPbaOffset": 0,
|
|
"MSICAPBaseOffset": 0,
|
|
"MaximumLatency": 0,
|
|
"BAR2LegacyIO": false,
|
|
"LatencyTimer": 0,
|
|
"BAR4LegacyIO": false,
|
|
"PXCAPLinkStatus": 0,
|
|
"PXCAPDevCap2": 0,
|
|
"PXCAPDevCtrl": 0,
|
|
"MSICAPMaskBits": 0,
|
|
"Command": 1,
|
|
"SubClassCode": 1,
|
|
"pci_func": 0,
|
|
"BAR5LegacyIO": false,
|
|
"MSICAPMsgData": 0,
|
|
"BIST": 0,
|
|
"PXCAPDevCtrl2": 0,
|
|
"pci_bus": 2,
|
|
"InterruptLine": 31,
|
|
"MSICAPMsgAddr": 0,
|
|
"BAR3LegacyIO": false,
|
|
"BAR4Size": 16,
|
|
"path": "system.realview.cf_ctrl",
|
|
"MinimumGrant": 0,
|
|
"Status": 640,
|
|
"BAR0Size": 256,
|
|
"system": "system",
|
|
"name": "cf_ctrl",
|
|
"PXCAPNextCapability": 0,
|
|
"eventq_index": 0,
|
|
"type": "IdeController",
|
|
"ctrl_offset": 2,
|
|
"PXCAPBaseOffset": 0,
|
|
"DeviceID": 28945,
|
|
"io_shift": 2,
|
|
"CacheLineSize": 0,
|
|
"dma": {
|
|
"peer": "system.iobus.slave[2]",
|
|
"role": "MASTER"
|
|
},
|
|
"PMCAPCapId": 0,
|
|
"config_latency": 20000,
|
|
"BAR1Size": 4096,
|
|
"pio": {
|
|
"peer": "system.iobus.master[8]",
|
|
"role": "SLAVE"
|
|
},
|
|
"pci_dev": 0,
|
|
"PMCAPCtrlStatus": 0,
|
|
"cxx_class": "IdeController",
|
|
"clk_domain": "system.clk_domain",
|
|
"SubsystemVendorID": 0,
|
|
"PMCAPBaseOffset": 0,
|
|
"config": {
|
|
"peer": "system.iobus.master[9]",
|
|
"role": "SLAVE"
|
|
},
|
|
"MSICAPPendingBits": 0,
|
|
"MSIXTableOffset": 0,
|
|
"MSICAPMsgUpperAddr": 0,
|
|
"MSICAPCapId": 0,
|
|
"BAR0LegacyIO": true,
|
|
"ProgIF": 133,
|
|
"BAR1LegacyIO": true,
|
|
"PMCAPCapabilities": 0,
|
|
"ClassCode": 1
|
|
},
|
|
"sp810_fake": {
|
|
"name": "sp810_fake",
|
|
"pio": {
|
|
"peer": "system.iobus.master[16]",
|
|
"role": "SLAVE"
|
|
},
|
|
"amba_id": 0,
|
|
"ignore_access": true,
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "AmbaFake",
|
|
"path": "system.realview.sp810_fake",
|
|
"pio_addr": 469893120,
|
|
"type": "AmbaFake"
|
|
},
|
|
"ethernet": {
|
|
"PMCAPNextCapability": 0,
|
|
"InterruptPin": 1,
|
|
"HeaderType": 0,
|
|
"VendorID": 32902,
|
|
"MSIXMsgCtrl": 0,
|
|
"MSIXCAPNextCapability": 0,
|
|
"PXCAPLinkCtrl": 0,
|
|
"Revision": 0,
|
|
"hardware_address": "00:90:00:00:00:01",
|
|
"LegacyIOBase": 0,
|
|
"pio_latency": 30000,
|
|
"platform": "system.realview",
|
|
"PXCAPLinkCap": 0,
|
|
"CapabilityPtr": 0,
|
|
"MSIXCAPBaseOffset": 0,
|
|
"PXCAPDevCapabilities": 0,
|
|
"MSIXCAPCapId": 0,
|
|
"BAR3Size": 0,
|
|
"rx_desc_cache_size": 64,
|
|
"PXCAPCapabilities": 0,
|
|
"SubsystemID": 4104,
|
|
"PXCAPCapId": 0,
|
|
"BAR4": 0,
|
|
"BAR1": 0,
|
|
"BAR0": 0,
|
|
"BAR3": 0,
|
|
"BAR2": 0,
|
|
"BAR5": 0,
|
|
"PXCAPDevStatus": 0,
|
|
"BAR2Size": 0,
|
|
"MSICAPNextCapability": 0,
|
|
"ExpansionROM": 0,
|
|
"rx_write_delay": 0,
|
|
"MSICAPMsgCtrl": 0,
|
|
"BAR5Size": 0,
|
|
"CardbusCIS": 0,
|
|
"MSIXPbaOffset": 0,
|
|
"MSICAPBaseOffset": 0,
|
|
"MaximumLatency": 0,
|
|
"BAR2LegacyIO": false,
|
|
"LatencyTimer": 0,
|
|
"BAR4LegacyIO": false,
|
|
"PXCAPLinkStatus": 0,
|
|
"PXCAPDevCap2": 0,
|
|
"PXCAPDevCtrl": 0,
|
|
"MSICAPMaskBits": 0,
|
|
"Command": 0,
|
|
"SubClassCode": 0,
|
|
"pci_func": 0,
|
|
"BAR5LegacyIO": false,
|
|
"MSICAPMsgData": 0,
|
|
"BIST": 0,
|
|
"PXCAPDevCtrl2": 0,
|
|
"pci_bus": 0,
|
|
"InterruptLine": 1,
|
|
"fetch_delay": 10000,
|
|
"MSICAPMsgAddr": 0,
|
|
"BAR3LegacyIO": false,
|
|
"BAR4Size": 0,
|
|
"path": "system.realview.ethernet",
|
|
"MinimumGrant": 255,
|
|
"phy_epid": 896,
|
|
"Status": 0,
|
|
"BAR0Size": 131072,
|
|
"system": "system",
|
|
"name": "ethernet",
|
|
"PXCAPNextCapability": 0,
|
|
"eventq_index": 0,
|
|
"type": "IGbE",
|
|
"tx_fifo_size": 393216,
|
|
"PXCAPBaseOffset": 0,
|
|
"DeviceID": 4213,
|
|
"tx_read_delay": 0,
|
|
"CacheLineSize": 0,
|
|
"dma": {
|
|
"peer": "system.iobus.slave[4]",
|
|
"role": "MASTER"
|
|
},
|
|
"PMCAPCapId": 0,
|
|
"tx_desc_cache_size": 64,
|
|
"config_latency": 20000,
|
|
"BAR1Size": 0,
|
|
"pio": {
|
|
"peer": "system.iobus.master[25]",
|
|
"role": "SLAVE"
|
|
},
|
|
"pci_dev": 0,
|
|
"PMCAPCtrlStatus": 0,
|
|
"cxx_class": "IGbE",
|
|
"wb_delay": 10000,
|
|
"fetch_comp_delay": 10000,
|
|
"clk_domain": "system.clk_domain",
|
|
"SubsystemVendorID": 32902,
|
|
"PMCAPBaseOffset": 0,
|
|
"config": {
|
|
"peer": "system.iobus.master[26]",
|
|
"role": "SLAVE"
|
|
},
|
|
"MSICAPPendingBits": 0,
|
|
"MSIXTableOffset": 0,
|
|
"MSICAPMsgUpperAddr": 0,
|
|
"MSICAPCapId": 0,
|
|
"BAR0LegacyIO": false,
|
|
"ProgIF": 0,
|
|
"BAR1LegacyIO": false,
|
|
"wb_comp_delay": 10000,
|
|
"PMCAPCapabilities": 0,
|
|
"ClassCode": 2,
|
|
"rx_fifo_size": 393216,
|
|
"phy_pid": 680
|
|
},
|
|
"ide": {
|
|
"PMCAPNextCapability": 0,
|
|
"InterruptPin": 2,
|
|
"HeaderType": 0,
|
|
"VendorID": 32902,
|
|
"MSIXMsgCtrl": 0,
|
|
"MSIXCAPNextCapability": 0,
|
|
"PXCAPLinkCtrl": 0,
|
|
"Revision": 0,
|
|
"LegacyIOBase": 0,
|
|
"pio_latency": 30000,
|
|
"platform": "system.realview",
|
|
"PXCAPLinkCap": 0,
|
|
"CapabilityPtr": 0,
|
|
"MSIXCAPBaseOffset": 0,
|
|
"PXCAPDevCapabilities": 0,
|
|
"MSIXCAPCapId": 0,
|
|
"BAR3Size": 4,
|
|
"PXCAPCapabilities": 0,
|
|
"SubsystemID": 0,
|
|
"PXCAPCapId": 0,
|
|
"BAR4": 1,
|
|
"BAR1": 1,
|
|
"BAR0": 1,
|
|
"BAR3": 1,
|
|
"BAR2": 1,
|
|
"BAR5": 1,
|
|
"PXCAPDevStatus": 0,
|
|
"disks": [
|
|
"system.cf0"
|
|
],
|
|
"BAR2Size": 8,
|
|
"MSICAPNextCapability": 0,
|
|
"ExpansionROM": 0,
|
|
"MSICAPMsgCtrl": 0,
|
|
"BAR5Size": 0,
|
|
"CardbusCIS": 0,
|
|
"MSIXPbaOffset": 0,
|
|
"MSICAPBaseOffset": 0,
|
|
"MaximumLatency": 0,
|
|
"BAR2LegacyIO": false,
|
|
"LatencyTimer": 0,
|
|
"BAR4LegacyIO": false,
|
|
"PXCAPLinkStatus": 0,
|
|
"PXCAPDevCap2": 0,
|
|
"PXCAPDevCtrl": 0,
|
|
"MSICAPMaskBits": 0,
|
|
"Command": 0,
|
|
"SubClassCode": 1,
|
|
"pci_func": 0,
|
|
"BAR5LegacyIO": false,
|
|
"MSICAPMsgData": 0,
|
|
"BIST": 0,
|
|
"PXCAPDevCtrl2": 0,
|
|
"pci_bus": 0,
|
|
"InterruptLine": 2,
|
|
"MSICAPMsgAddr": 0,
|
|
"BAR3LegacyIO": false,
|
|
"BAR4Size": 16,
|
|
"path": "system.realview.ide",
|
|
"MinimumGrant": 0,
|
|
"Status": 640,
|
|
"BAR0Size": 8,
|
|
"system": "system",
|
|
"name": "ide",
|
|
"PXCAPNextCapability": 0,
|
|
"eventq_index": 0,
|
|
"type": "IdeController",
|
|
"ctrl_offset": 0,
|
|
"PXCAPBaseOffset": 0,
|
|
"DeviceID": 28945,
|
|
"io_shift": 0,
|
|
"CacheLineSize": 0,
|
|
"dma": {
|
|
"peer": "system.iobus.slave[3]",
|
|
"role": "MASTER"
|
|
},
|
|
"PMCAPCapId": 0,
|
|
"config_latency": 20000,
|
|
"BAR1Size": 4,
|
|
"pio": {
|
|
"peer": "system.iobus.master[23]",
|
|
"role": "SLAVE"
|
|
},
|
|
"pci_dev": 1,
|
|
"PMCAPCtrlStatus": 0,
|
|
"cxx_class": "IdeController",
|
|
"clk_domain": "system.clk_domain",
|
|
"SubsystemVendorID": 0,
|
|
"PMCAPBaseOffset": 0,
|
|
"config": {
|
|
"peer": "system.iobus.master[24]",
|
|
"role": "SLAVE"
|
|
},
|
|
"MSICAPPendingBits": 0,
|
|
"MSIXTableOffset": 0,
|
|
"MSICAPMsgUpperAddr": 0,
|
|
"MSICAPCapId": 0,
|
|
"BAR0LegacyIO": false,
|
|
"ProgIF": 133,
|
|
"BAR1LegacyIO": false,
|
|
"PMCAPCapabilities": 0,
|
|
"ClassCode": 1
|
|
}
|
|
},
|
|
"membus": {
|
|
"default": {
|
|
"peer": "system.membus.badaddr_responder.pio",
|
|
"role": "MASTER"
|
|
},
|
|
"slave": {
|
|
"peer": [
|
|
"system.realview.hdlcd.dma",
|
|
"system.system_port",
|
|
"system.cpu.l2cache.mem_side",
|
|
"system.iocache.mem_side"
|
|
],
|
|
"role": "SLAVE"
|
|
},
|
|
"name": "membus",
|
|
"badaddr_responder": {
|
|
"system": "system",
|
|
"ret_data8": 255,
|
|
"name": "badaddr_responder",
|
|
"warn_access": "warn",
|
|
"pio": {
|
|
"peer": "system.membus.default",
|
|
"role": "SLAVE"
|
|
},
|
|
"ret_bad_addr": true,
|
|
"pio_latency": 100000,
|
|
"clk_domain": "system.clk_domain",
|
|
"fake_mem": false,
|
|
"pio_size": 8,
|
|
"ret_data32": 4294967295,
|
|
"eventq_index": 0,
|
|
"update_data": false,
|
|
"ret_data64": 18446744073709551615,
|
|
"cxx_class": "IsaFake",
|
|
"path": "system.membus.badaddr_responder",
|
|
"pio_addr": 0,
|
|
"type": "IsaFake",
|
|
"ret_data16": 65535
|
|
},
|
|
"snoop_filter": null,
|
|
"forward_latency": 4,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"width": 16,
|
|
"eventq_index": 0,
|
|
"master": {
|
|
"peer": [
|
|
"system.bridge.slave",
|
|
"system.realview.nvmem.port",
|
|
"system.realview.gic.pio",
|
|
"system.realview.vgic.pio",
|
|
"system.realview.local_cpu_timer.pio",
|
|
"system.physmem.port"
|
|
],
|
|
"role": "MASTER"
|
|
},
|
|
"response_latency": 2,
|
|
"cxx_class": "CoherentXBar",
|
|
"path": "system.membus",
|
|
"snoop_response_latency": 4,
|
|
"type": "CoherentXBar",
|
|
"use_default_range": false,
|
|
"frontend_latency": 3
|
|
},
|
|
"multi_thread": false,
|
|
"eventq_index": 0,
|
|
"iocache": {
|
|
"cpu_side": {
|
|
"peer": "system.iobus.master[27]",
|
|
"role": "SLAVE"
|
|
},
|
|
"clusivity": "mostly_incl",
|
|
"prefetcher": null,
|
|
"clk_domain": "system.clk_domain",
|
|
"write_buffers": 8,
|
|
"response_latency": 50,
|
|
"cxx_class": "Cache",
|
|
"size": 1024,
|
|
"tags": {
|
|
"name": "tags",
|
|
"eventq_index": 0,
|
|
"hit_latency": 50,
|
|
"clk_domain": "system.clk_domain",
|
|
"sequential_access": false,
|
|
"assoc": 8,
|
|
"cxx_class": "LRU",
|
|
"path": "system.iocache.tags",
|
|
"block_size": 64,
|
|
"type": "LRU",
|
|
"size": 1024
|
|
},
|
|
"system": "system",
|
|
"max_miss_count": 0,
|
|
"eventq_index": 0,
|
|
"mem_side": {
|
|
"peer": "system.membus.slave[3]",
|
|
"role": "MASTER"
|
|
},
|
|
"type": "Cache",
|
|
"forward_snoops": false,
|
|
"writeback_clean": false,
|
|
"hit_latency": 50,
|
|
"tgts_per_mshr": 12,
|
|
"demand_mshr_reserve": 1,
|
|
"addr_ranges": [
|
|
"2147483648:2415919103"
|
|
],
|
|
"is_read_only": false,
|
|
"prefetch_on_access": false,
|
|
"path": "system.iocache",
|
|
"name": "iocache",
|
|
"mshrs": 20,
|
|
"sequential_access": false,
|
|
"assoc": 8
|
|
},
|
|
"dvfs_handler": {
|
|
"enable": false,
|
|
"name": "dvfs_handler",
|
|
"sys_clk_domain": "system.clk_domain",
|
|
"transition_latency": 100000000,
|
|
"eventq_index": 0,
|
|
"cxx_class": "DVFSHandler",
|
|
"domains": [],
|
|
"path": "system.dvfs_handler",
|
|
"type": "DVFSHandler"
|
|
},
|
|
"work_end_exit_count": 0,
|
|
"type": "LinuxArmSystem",
|
|
"bridge": {
|
|
"ranges": [
|
|
"788529152:805306367",
|
|
"721420288:725614591",
|
|
"805306368:1073741823",
|
|
"1073741824:1610612735",
|
|
"402653184:469762047",
|
|
"469762048:536870911"
|
|
],
|
|
"slave": {
|
|
"peer": "system.membus.master[0]",
|
|
"role": "SLAVE"
|
|
},
|
|
"name": "bridge",
|
|
"req_size": 16,
|
|
"clk_domain": "system.clk_domain",
|
|
"delay": 50000,
|
|
"eventq_index": 0,
|
|
"master": {
|
|
"peer": "system.iobus.slave[0]",
|
|
"role": "MASTER"
|
|
},
|
|
"cxx_class": "Bridge",
|
|
"path": "system.bridge",
|
|
"resp_size": 16,
|
|
"type": "Bridge"
|
|
},
|
|
"voltage_domain": {
|
|
"name": "voltage_domain",
|
|
"eventq_index": 0,
|
|
"voltage": [
|
|
"1.0"
|
|
],
|
|
"cxx_class": "VoltageDomain",
|
|
"path": "system.voltage_domain",
|
|
"type": "VoltageDomain"
|
|
},
|
|
"cache_line_size": 64,
|
|
"boot_osflags": "earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1",
|
|
"physmem": [
|
|
{
|
|
"range": "2147483648:2415919103",
|
|
"latency": 30000,
|
|
"name": "physmem",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "73.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.physmem",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[5]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
}
|
|
],
|
|
"terminal": {
|
|
"name": "terminal",
|
|
"output": true,
|
|
"number": 0,
|
|
"intr_control": "system.intrctrl",
|
|
"eventq_index": 0,
|
|
"cxx_class": "Terminal",
|
|
"path": "system.terminal",
|
|
"type": "Terminal",
|
|
"port": 3456
|
|
},
|
|
"reset_addr_64": 0,
|
|
"cpu": [
|
|
{
|
|
"do_statistics_insts": true,
|
|
"numThreads": 1,
|
|
"itb": {
|
|
"name": "itb",
|
|
"is_stage2": false,
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TLB",
|
|
"walker": {
|
|
"name": "walker",
|
|
"is_stage2": false,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"sys": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TableWalker",
|
|
"path": "system.cpu.itb.walker",
|
|
"type": "ArmTableWalker",
|
|
"port": {
|
|
"peer": "system.cpu.toL2Bus.slave[2]",
|
|
"role": "MASTER"
|
|
},
|
|
"num_squash_per_cycle": 2
|
|
},
|
|
"path": "system.cpu.itb",
|
|
"type": "ArmTLB",
|
|
"size": 64
|
|
},
|
|
"simulate_data_stalls": false,
|
|
"istage2_mmu": {
|
|
"name": "istage2_mmu",
|
|
"tlb": "system.cpu.itb",
|
|
"sys": "system",
|
|
"stage2_tlb": {
|
|
"name": "stage2_tlb",
|
|
"is_stage2": true,
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TLB",
|
|
"walker": {
|
|
"name": "walker",
|
|
"is_stage2": true,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"sys": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TableWalker",
|
|
"path": "system.cpu.istage2_mmu.stage2_tlb.walker",
|
|
"type": "ArmTableWalker",
|
|
"num_squash_per_cycle": 2
|
|
},
|
|
"path": "system.cpu.istage2_mmu.stage2_tlb",
|
|
"type": "ArmTLB",
|
|
"size": 32
|
|
},
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::Stage2MMU",
|
|
"path": "system.cpu.istage2_mmu",
|
|
"type": "ArmStage2MMU"
|
|
},
|
|
"function_trace": false,
|
|
"do_checkpoint_insts": true,
|
|
"cxx_class": "AtomicSimpleCPU",
|
|
"max_loads_all_threads": 0,
|
|
"system": "system",
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"function_trace_start": 0,
|
|
"cpu_id": 0,
|
|
"width": 1,
|
|
"checker": null,
|
|
"eventq_index": 0,
|
|
"toL2Bus": {
|
|
"slave": {
|
|
"peer": [
|
|
"system.cpu.icache.mem_side",
|
|
"system.cpu.dcache.mem_side",
|
|
"system.cpu.itb.walker.port",
|
|
"system.cpu.dtb.walker.port"
|
|
],
|
|
"role": "SLAVE"
|
|
},
|
|
"name": "toL2Bus",
|
|
"snoop_filter": {
|
|
"name": "snoop_filter",
|
|
"system": "system",
|
|
"max_capacity": 8388608,
|
|
"eventq_index": 0,
|
|
"cxx_class": "SnoopFilter",
|
|
"path": "system.cpu.toL2Bus.snoop_filter",
|
|
"type": "SnoopFilter",
|
|
"lookup_latency": 0
|
|
},
|
|
"forward_latency": 0,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"system": "system",
|
|
"width": 32,
|
|
"eventq_index": 0,
|
|
"master": {
|
|
"peer": [
|
|
"system.cpu.l2cache.cpu_side"
|
|
],
|
|
"role": "MASTER"
|
|
},
|
|
"response_latency": 1,
|
|
"cxx_class": "CoherentXBar",
|
|
"path": "system.cpu.toL2Bus",
|
|
"snoop_response_latency": 1,
|
|
"type": "CoherentXBar",
|
|
"use_default_range": false,
|
|
"frontend_latency": 1
|
|
},
|
|
"do_quiesce": true,
|
|
"type": "AtomicSimpleCPU",
|
|
"fastmem": false,
|
|
"profile": 0,
|
|
"icache_port": {
|
|
"peer": "system.cpu.icache.cpu_side",
|
|
"role": "MASTER"
|
|
},
|
|
"icache": {
|
|
"cpu_side": {
|
|
"peer": "system.cpu.icache_port",
|
|
"role": "SLAVE"
|
|
},
|
|
"clusivity": "mostly_incl",
|
|
"prefetcher": null,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"write_buffers": 8,
|
|
"response_latency": 2,
|
|
"cxx_class": "Cache",
|
|
"size": 32768,
|
|
"tags": {
|
|
"name": "tags",
|
|
"eventq_index": 0,
|
|
"hit_latency": 2,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"sequential_access": false,
|
|
"assoc": 1,
|
|
"cxx_class": "LRU",
|
|
"path": "system.cpu.icache.tags",
|
|
"block_size": 64,
|
|
"type": "LRU",
|
|
"size": 32768
|
|
},
|
|
"system": "system",
|
|
"max_miss_count": 0,
|
|
"eventq_index": 0,
|
|
"mem_side": {
|
|
"peer": "system.cpu.toL2Bus.slave[0]",
|
|
"role": "MASTER"
|
|
},
|
|
"type": "Cache",
|
|
"forward_snoops": true,
|
|
"writeback_clean": true,
|
|
"hit_latency": 2,
|
|
"tgts_per_mshr": 20,
|
|
"demand_mshr_reserve": 1,
|
|
"addr_ranges": [
|
|
"0:18446744073709551615"
|
|
],
|
|
"is_read_only": true,
|
|
"prefetch_on_access": false,
|
|
"path": "system.cpu.icache",
|
|
"name": "icache",
|
|
"mshrs": 4,
|
|
"sequential_access": false,
|
|
"assoc": 1
|
|
},
|
|
"interrupts": [
|
|
{
|
|
"eventq_index": 0,
|
|
"path": "system.cpu.interrupts",
|
|
"type": "ArmInterrupts",
|
|
"name": "interrupts",
|
|
"cxx_class": "ArmISA::Interrupts"
|
|
}
|
|
],
|
|
"dcache_port": {
|
|
"peer": "system.cpu.dcache.cpu_side",
|
|
"role": "MASTER"
|
|
},
|
|
"socket_id": 0,
|
|
"max_insts_all_threads": 0,
|
|
"dstage2_mmu": {
|
|
"name": "dstage2_mmu",
|
|
"tlb": "system.cpu.dtb",
|
|
"sys": "system",
|
|
"stage2_tlb": {
|
|
"name": "stage2_tlb",
|
|
"is_stage2": true,
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TLB",
|
|
"walker": {
|
|
"name": "walker",
|
|
"is_stage2": true,
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"sys": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "ArmISA::TableWalker",
|
|
"path": "system.cpu.dstage2_mmu.stage2_tlb.walker",
|
|
"type": "ArmTableWalker",
|
|
"num_squash_per_cycle": 2
|
|
},
|
|
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